Joshi, Siddharth

A compute-in-memory chip based on resistive random-access memory

Wan, W., Kubendran, R., Schaefer, C., Eryilmaz, S. B., Zhang, W., Wu, D., Deiss, S., Raina, P., Qian, H., Gao, B., et al. (2022) · Nature

Advanced Memory and Neural ComputingFerroelectric and Negative Capacitance Devices

Cited by 943

Hierarchical Address Event Routing for Reconfigurable Large-Scale Neuromorphic Systems

Park, J., Yu, T., Joshi, S., Maier, C., & Cauwenberghs, G. (2017) · IEEE Transactions on Neural Networks and Learning Systems

Advanced Memory and Neural ComputingInterconnection Networks and Systems

Cited by 118

Sub- $\mu$ Vrms-Noise Sub- $\mu$ W/Channel ADC-Direct Neural Recording With 200-mV/ms Transient Recovery Through Predictive Digital Autoranging

Kim, C., Joshi, S., Courellis, H., Wang, J., Miller, C., & Cauwenberghs, G. (2018) · IEEE Journal of Solid-State Circuits

Analog and Mixed-Signal Circuit DesignRadio Frequency Integrated Circuit Design

Cited by 104

A Voltage-Mode Sensing Scheme with Differential-Row Weight Mapping for Energy-Efficient RRAM-Based In-Memory Computing

Wan, W., Kubendran, R., Gao, B., Joshi, S., Raina, P., Wu, H., Cauwenberghs, G., & Wong, H. S. P. (2020) · 2020 IEEE Symposium on VLSI Technology

Advanced Memory and Neural ComputingLow-power high-performance VLSI design

Cited by 42

Memory-Efficient Synaptic Connectivity for Spike-Timing- Dependent Plasticity

Pedroni, B. U., Joshi, S., Deiss, S. R., Sheik, S., Detorakis, G., Paul, S., Augustine, C., Neftci, E. O., & Cauwenberghs, G. (2019) · Frontiers in Neuroscience

Advanced Memory and Neural ComputingNeural dynamics and brain function

Cited by 29