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Realization of a Silicon Nanowire Vertical Surround‐Gate Field‐Effect Transistor
Abstract
A generic process for fabricating vertical surround-gate field-effect transistors (FETs) from epitaxially grown silicon nanowires is presented. The process is demonstrated using n-type Si nanowires grown on a p-type substrate in ultrahigh vacuum using a Au catalyst. The process consists of various deposition and etching steps; no chemical or mechanical polishing is required. Individual as well as arrays of vertical surround-gate FETs can be fabricated.
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Cited by
Metal‐Assisted Chemical Etching of Silicon: A Review: In memory of Prof. Ulrich Gösele
Huang, Z., Geyer, N., Werner, P., de Boor, J., & Gösele, U. (2011) · Advanced Materials · doi:10.1002/adma.201001784 · Cited by 1,909
Self-citationPhase change memory technology
Burr, G. W., Breitwisch, M. J., Franceschini, M., Garetto, D., Gopalakrishnan, K., Jackson, B., Kurdi, B., Lam, C., Lastras, L. A., Padilla, A., et al. (2010) · Journal of Vacuum Science & Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena · doi:10.1116/1.3301579 · Cited by 916
Semiconductor Nanowires: From Self‐Organization to Patterned Growth
Fan, H. J., Werner, P., & Zacharias, M. (2006) · Small · doi:10.1002/smll.200500495 · Cited by 759
Nanowire-based one-dimensional electronics
Thelander, C., Agarwal, P., Brongersma, S., Eymery, J., Feiner, L. F., Forchel, A., Scheffler, M., Riess, W., Ohlsson, B. J., Gösele, U., et al. (2006) · Materials Today · doi:10.1016/s1369-7021(06)71651-0 · Cited by 707
Self-citationHighly scalable non-volatile and ultra-low-power phase-change nanowire memory
Lee, S.-H., Jung, Y., & Agarwal, R. (2007) · Nature Nanotechnology · doi:10.1038/nnano.2007.291 · Cited by 419
Metadata
- Authors
- Schmidt, V., Riel, H., Senz, S., Karg, S., Riess, W., & Gösele, U.
- Venue
- Small
- Publisher
- Wiley
- Published
- 2005-12-05
- Volume
- 2
- Issue
- 1
- Pages
- 85-88
- ISSN
- 1613-6810 (ISSN-L)
- 1613-6829
- OpenAlex
- W1988549895
- Cited by
- 390
- References
- 0
- FWCI
- 16.14
- Type
- journal article
- Language
- en
- Open access
- closed
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- Schmidt, V., Riel, H., Senz, S., Karg, S., Riess, W., & Gösele, U. (2006). Realization of a Silicon Nanowire Vertical Surround‐Gate Field‐Effect Transistor. Small. https://doi.org/10.1002/smll.200500181
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Contains information from the Semantic Scholar Academic Graph Datasets, made available under the ODC Attribution License (ODC-BY 1.0).
Semantic Scholar’s data is described in: Kinney, R., et al. (2023). The Semantic Scholar Open Data Platform. arXiv:2301.10140.
