Hardware implementation of real-time Extreme Learning Machine in FPGA: Analysis of precision, resource occupation and performance
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Among the three architecture approaches, ELM2 consumes 33% less RAM resources compared to ELM1, and ELM3 and ELM1 consume fewer DSP blocks due to sequential operations.
“Based on the three different architecture approaches, ELM2 consumes 33% less RAM resources compared to ELM1, and ELM3 and ELM1 consume fewer DSP blocks due to sequential operations.”
From Embedded Intelligence on FPGA: Survey, Applications and Challenges (2021) · cites this paper as [57]
Applying QR decomposition and pipelined architecture can save up to twenty-two times power consumption with similar performance compared to the traditional ELM method.
“Lastly, by applying the QR decomposition and pipelined architecture, it can save up to twenty-two times power consumption with similar performance as compared to the traditional ELM method [57].”
From Embedded Intelligence on FPGA: Survey, Applications and Challenges (2021) · cites this paper as [57]
Cites
Extreme learning machine: Theory and applications
Huang, G.-B., Zhu, Q.-Y., & Siew, C.-K. (2006) · Neurocomputing · doi:10.1016/j.neucom.2005.12.126 · Cited by 13,285 · see citing works
Numerical Methods for Least Squares Problems
Björck, Å. (1996) · Society for Industrial and Applied Mathematics eBooks · doi:10.1137/1.9781611971484 · Cited by 3,276 · see citing works
Generalized Inverse of Matrices and Its Applications
Banerjee, K. S. (1973) · Technometrics · doi:10.1080/00401706.1973.10489026 · Cited by 2,291 · see citing works
A Fast and Accurate Online Sequential Learning Algorithm for Feedforward Networks
Liang, N., Huang, G.-B., Saratchandran, P., & Sundararajan, N. (2006) · IEEE Transactions on Neural Networks · doi:10.1109/tnn.2006.880583 · Cited by 1,967 · see citing works
Learning and generalization characteristics of the random vector functional-link net
Pao, Y., Park, G.-H., & Šobajić, D. J. (1994) · Neurocomputing · doi:10.1016/0925-2312(94)90053-1 · Cited by 1,145 · see citing works
Extreme Learning Machines [Trends & Controversies]
Cambria, E., Huang, G.-B., Kasun, L. L. C., Zhou, H., Vong, C., Lin, J., Yin, J., Cai, Z., Liu, Q., Li, K., et al. (2013) · IEEE Intelligent Systems · doi:10.1109/mis.2013.140 · Cited by 710 · see citing works
Solving linear least squares problems by Gram-Schmidt orthogonalization
Björck, Å. (1967) · BIT Numerical Mathematics · doi:10.1007/bf01934122 · Cited by 478 · see citing works
Matrix Algebra: Theory, Computations, and Applications in Statistics
Gentle, J. E. (2007) · doi:10.1007/978-0-387-70873-7 · Cited by 277 · see citing works
Electricity Price Forecasting With Extreme Learning Machine and Bootstrapping
Chen, X., Dong, Z. Y., Meng, K., Xu, Y. H., Wong, K. P., & Ngan, H. W. (2012) · IEEE Transactions on Power Systems · doi:10.1109/tpwrs.2012.2190627 · Cited by 273 · see citing works
Proceedings of 1994 28th Asilomar Conference on Signals, Systems and Computers
(1994) · Asilomar Conference on Signals, Systems and Computers (ACSSC) · doi:10.1109/acssc.1994.471404 · Cited by 236 · see citing works
FPGA Implementation of Matrix Inversion Using QRD-RLS Algorithm
Karkooti, M., Cavallaro, J. R., & Dick, C. (2006) · 2018 52nd Asilomar Conference on Signals, Systems, and Computers · doi:10.1109/acssc.2005.1600043 · Cited by 155 · see citing works
Regularized online sequential learning algorithm for single-hidden layer feedforward neural networks
Huynh, H. T., & Won, Y. (2011) · Pattern Recognition Letters · doi:10.1016/j.patrec.2011.07.016 · Cited by 117 · see citing works
Efficient Digital Implementation of Extreme Learning Machines for Classification
Decherchi, S., Gastaldo, P., Leoncini, A., & Zunino, R. (2012) · IEEE Transactions on Circuits & Systems II Express Briefs · doi:10.1109/tcsii.2012.2204112 · Cited by 91 · see citing works
Algorithms for the QR-Decomposition
Gander, W. (2003) · Cited by 84 · see citing works
Realtime training on mobile devices for face recognition applications
Choi, K., Toh, K., & Byun, H. (2010) · Pattern Recognition · doi:10.1016/j.patcog.2010.08.009 · Cited by 62 · see citing works
Pardo, J., Zamora-Martínez, F., & Botella-Rocamora, P. (2015) · Sensors · doi:10.3390/s150409277 · Cited by 37 · see citing works
Sign language recognition using the Extreme Learning Machine
Sole, M. M., & Tšoeu, M. S. (2011) · IEEE AFRICON · doi:10.1109/afrcon.2011.6072114 · Cited by 30 · see citing works
A Fixed-Point Implementation for QR Decomposition
Singh, C., Prasad, S., & Balsara, P. T. (2006) · doi:10.1109/dcas.2006.321037 · Cited by 28 · see citing works
Hardware implementation methods in Random Vector Functional-Link Networks
Martínez-Villena, J. M., Rosado-Muñoz, A., & Soria‐Olivas, E. (2014) · Applied Intelligence · doi:10.1007/s10489-013-0501-1 · Cited by 20 · see citing works
Self-citationHardware-efficient matrix inversion algorithm for complex adaptive systems
Rosado-Muñoz, A., Iakymchuk, T., Bataller, M. G., & Węgrzyn, M. (2012) · IEEE International Conference on Electronics, Circuits and Systems (ICECS) · doi:10.1109/icecs.2012.6463562 · Cited by 15 · see citing works
Self-citationCMOL implementation of spiking neurons and spike-timing dependent plasticity
Afifi, A., Ayatollahi, A., & Raissi, F. (2011) · International Journal of Circuit Theory and Applications · doi:10.1002/cta.638 · Cited by 13 · see citing works
Vijean, V., Hariharan, M., Yaacob, S., Sulaiman, M. N. B., & Adom, A. H. (2013) · Computers & Electrical Engineering · doi:10.1016/j.compeleceng.2012.12.022 · Cited by 11 · see citing works
FPGA Implementation of Modified Gram-Schmidt QR-Decomposition
Ganchosv, P., Kusmanov., G., Kabakchiev, C. A., Behar, V. P., Romansky, R. P., & Gaydadjiev, G. N. (2009) · High Performance Embedded Architectures and Compilers · Cited by 9 · see citing works
Rosado-Muñoz, A., Vila‐Francés, J., & Gómez‐Chova, L. (2020) · TUGraz OPEN Library (Graz University of Technology) · doi:10.3217/jucs-014-10-1678 · Cited by 8 · see citing works
Self-citationEfficient hardware implementation of threshold neural networks
Zamanlooy, B., & Mirhassani, M. (2012) · IEEE International NEWCAS Conference (NEWCAS) · doi:10.1109/newcas.2012.6328941 · Cited by 5 · see citing works
A 50-neuron CMOS analog chip with on-chip digital learning: design, development, and experiments
Salam, F. M. A., Wang, Y., & Oh, H.-J. (1999) · Computers & Electrical Engineering · doi:10.1016/s0045-7906(99)00017-8 · Cited by 4 · see citing works
Complex Fixed-Point Matrix Inversion Using Transport Triggered Architecture
Burian, A., Salmela, P., & Takala, J. (2006) · doi:10.1109/asap.2005.25 · Cited by 3 · see citing works
Czajkowski, A., & Patan, K. (2009) · Cited by 2 · see citing works
A model for communicating long synapses with guaranteed latencies on large neural networks
Barrera, A. E. G., & Aróstegui, J. M. M. (2015) · Computers & Electrical Engineering · doi:10.1016/j.compeleceng.2015.05.007 · Cited by 1 · see citing works
Martínez-Villena, J. M., Francés-Víllora, J. V., Rosado-Muñoz, A., Bataller‐Mompeán, M., Guerrero, J., Węgrzyn, M., & Adamski, M. (2015) · IEEE International Conference on Industrial Informatics (INDIN) · doi:10.1109/indin.2015.7281850 · Cited by 1 · see citing works
Self-citation
Flagged first, then by citations
2 of the 32 references couldn’t be matched to a known paper.
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Ali, M., & Prasad, R. (2019) · Renewable and Sustainable Energy Reviews · doi:10.1016/j.rser.2019.01.014 · Cited by 240 · see citing works
Prasad, R., Deo, R. C., Li, Y., & Maraseni, T. (2018) · Geoderma · doi:10.1016/j.geoderma.2018.05.035 · Cited by 208 · see citing works
Opportunities in Quantum Reservoir Computing and Extreme Learning Machines
Mujal, P., Martínez‐Peña, R., Nokkala, J., García‐Beni, J., Giorgi, G. L., Soriano, M. C., & Zambrini, R. (2021) · Advanced Quantum Technologies · doi:10.1002/qute.202100027 · Cited by 170 · see citing works
Embedded Intelligence on FPGA: Survey, Applications and Challenges
Seng, K. P., Lee, P. J., & Ang, L. M. (2021) · Electronics · doi:10.3390/electronics10080895 · Cited by 105 · see citing works
“Lastly, by applying the QR decomposition and pipelined architecture, it can save up to twenty-two times power consumption with similar performance as compared to the traditional ELM method [57].”
MethodA Neural Network-Based On-device Learning Anomaly Detector for Edge Devices
Tsukada, M., Kondo, M., & Matsutani, H. (2020) · IEEE Transactions on Computers · doi:10.1109/tc.2020.2973631 · Cited by 81 · see citing works
Chia, M. Y., Huang, Y. F., & Koo, C. H. (2020) · Agricultural Water Management · doi:10.1016/j.agwat.2020.106447 · Cited by 80 · see citing works
Medus, L. D., Iakymchuk, T., Francés-Víllora, J. V., Bataller‐Mompeán, M., & Rosado-Muñoz, A. (2019) · IEEE Access · doi:10.1109/access.2019.2920885 · Cited by 66 · see citing works
Self-citationMicrogrid protection under wind speed intermittency using extreme learning machine
Manohar, M., Koley, E., & Ghosh, S. (2018) · Computers & Electrical Engineering · doi:10.1016/j.compeleceng.2018.10.005 · Cited by 56 · see citing works
Safaei, A., Wu, Q. M. J., Akilan, T., & Yang, Y. (2018) · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · doi:10.1109/tcad.2018.2878162 · Cited by 46 · see citing works
Neuromorphic extreme learning machines with bimodal memristive synapses
Dong, Z., Lai, C. S., Zhang, Z., Qi, D., Gao, M., & Duan, S. (2021) · Neurocomputing · doi:10.1016/j.neucom.2021.04.049 · Cited by 45 · see citing works
A Maximally Split and Relaxed ADMM for Regularized Extreme Learning Machines
Lai, X., Cao, J., Huang, X., Wang, T., & Lin, Z. (2019) · IEEE Transactions on Neural Networks and Learning Systems · doi:10.1109/tnnls.2019.2927385 · Cited by 36 · see citing works
Automated Detection of Epileptic Biomarkers in Resting-State Interictal MEG Data
Soriano, M. C., Niso, G., Clements, J. M., Ortín, S., Carrasco, S., Gudín, M., Mirasso, C. R., & Pereda, E. (2017) · Frontiers in Neuroinformatics · doi:10.3389/fninf.2017.00043 · Cited by 32 · see citing works
Ghosh, S. K., Ponnalagu, R. N., Tripathy, R. K., & Acharya, U. R. (2020) · BioMed Research International · doi:10.1155/2020/8843963 · Cited by 32 · see citing works
A Digital Implementation of Extreme Learning Machines for Resource-Constrained Devices
Ragusa, E., Gianoglio, C., Gastaldo, P., & Zunino, R. (2018) · IEEE Transactions on Circuits & Systems II Express Briefs · doi:10.1109/tcsii.2018.2806085 · Cited by 24 · see citing works
Francés-Víllora, J. V., Rosado-Muñoz, A., Bataller‐Mompeán, M., Barrios-Avilés, J., & Guerrero, J. (2018) · Electronics · doi:10.3390/electronics7110308 · Cited by 20 · see citing works
Self-citationAyala, H. V. H., Muñoz, D. M., Llanos, C. H., & Coelho, L. D. S. (2017) · Control Engineering Practice · doi:10.1016/j.conengprac.2016.12.004 · Cited by 19 · see citing works
Ragusa, E., Gianoglio, C., Zunino, R., & Gastaldo, P. (2019) · Neural Processing Letters · doi:10.1007/s11063-019-10165-y · Cited by 17 · see citing works
Liu, Q., Wu, Z., Cui, N., Zhang, W., Wang, Y., Hu, X., Gong, D., & Zheng, S. (2022) · Atmosphere · doi:10.3390/atmos13060971 · Cited by 15 · see citing works
Random-based networks with dropout for embedded systems
Ragusa, E., Gianoglio, C., Zunino, R., & Gastaldo, P. (2020) · Neural Computing and Applications · doi:10.1007/s00521-020-05414-4 · Cited by 13 · see citing works
- Retracted
OS-ELM-FPGA: An FPGA-Based Online Sequential Unsupervised Anomaly Detector
Tsukada, M., Kondo, M., & Matsutani, H. (2018) · Lecture notes in computer science · doi:10.1007/978-3-030-10549-5_41 · Cited by 9 · see citing works
AnScalable Matrix Computing Unit Architecture for FPGA, and SCUMO User Design Interface
Abbaszadeh, A., Iakymchuk, T., Bataller‐Mompeán, M., Francés-Víllora, J. V., & Rosado-Muñoz, A. (2019) · Electronics · doi:10.3390/electronics8010094 · Cited by 9 · see citing works
Self-citationSystem-on-a-chip (SoC)-based hardware acceleration for extreme learning machine
Safaei, A., Wu, Q. M. J., Yang, Y., & Akilan, T. (2017) · IEEE International Conference on Electronics, Circuits and Systems (ICECS) · doi:10.1109/icecs.2017.8292050 · Cited by 9 · see citing works
Extreme learning machine as a generalizable classification engine
Zyarah, A. M., & Kudithipudi, D. (2017) · International Joint Conference on Neural Networks (IJCNN) · doi:10.1109/ijcnn.2017.7966279 · Cited by 8 · see citing works
Sahani, M., Swain, B. K., & Dash, P. K. (2020) · IET Image Processing · doi:10.1049/ipr2.12101 · Cited by 8 · see citing works
Power Estimation and Validation of Embedded Multiplier Based on ANN and Regression Technique
Singh, N., Verma, G., & Khare, V. (2021) · Journal of Circuits Systems and Computers · doi:10.1142/s0218126622500864 · Cited by 8 · see citing works
Zhang, L., Peng, Y., Huang, A., & Hu, X. (2020) · IEEE Access · doi:10.1109/access.2020.2994657 · Cited by 7 · see citing works
On-line Learning of RVFL Neural Networks on Finite Precision Hardware
Rosato, A., Altilio, R., & Panella, M. (2018) · IEEE International Symposium on Circuits and Systems proceedings · doi:10.1109/iscas.2018.8351399 · Cited by 7 · see citing works
Martinez-Corral, U., & Basterretxea, K. (2017) · NASA/ESA Conference on Adaptive Hardware and Systems (AHS) · doi:10.1109/ahs.2017.8046368 · Cited by 5 · see citing works
Invited paper: Resource sharing in feed forward neural networks for energy efficiency
Zyarah, A. M., & Kudithipudi, D. (2017) · IEEE International Midwest Symposium on Circuits and Systems (MWSCAS) · doi:10.1109/mwscas.2017.8052980 · Cited by 5 · see citing works
An experimental evaluation of extreme learning machines on several hardware devices
Li, L., Wang, G., Wu, G., & Zhang, Q. (2019) · Neural Computing and Applications · doi:10.1007/s00521-019-04481-6 · Cited by 5 · see citing works
del Campo, I., Martinez, V. S., Echanobe, J., Asua, E., Finker, R., & Basterretxea, K. (2019) · Neural Computing and Applications · doi:10.1007/s00521-019-04386-4 · Cited by 5 · see citing works
A Novel Relaxed ADMM with Highly Parallel Implementation for Extreme Learning Machine
Lai, X., Cao, J., & Lin, Z. (2018) · IEEE International Symposium on Circuits and Systems proceedings · doi:10.1109/iscas.2018.8350920 · Cited by 4 · see citing works
Tan, C. Y., Ooi, C. Y., Choo, H. S., & Ismail, N. B. (2021) · International Journal of Circuit Theory and Applications · doi:10.1002/cta.3155 · Cited by 4 · see citing works
Accelerating Extreme Learning Machine on FPGA by Hardware Implementation of Given Rotation-QRD
Tan, C. Y., Ismail, N. B., Ooi, C. Y., & Hon, J. Y. (2019) · International Journal of Integrated Engineering · doi:10.30880/ijie.2019.11.07.005 · Cited by 3 · see citing works
A generic FPGA-based hardware architecture for recursive least mean p-power extreme learning machine
Huang, H. M., Yang, J., Rong, H.-J., & Du, S. (2021) · Neurocomputing · doi:10.1016/j.neucom.2021.05.069 · Cited by 3 · see citing works
Design of an Optimized CMOS ELM Accelerator
Sharma, M. K., Lohani, U. C., Parmar, V., & Suri, M. (2019) · International Conference on VLSI Design · doi:10.1109/vlsid.2019.00094 · Cited by 2 · see citing works
A Task-Parallel and Reconfigurable FPGA-Based Hardware Implementation of Extreme Learning Machine
Huang, H. M., Rong, H.-J., & Yang, Z.-X. (2022) · Asia Service Sciences and Software Engineering Conference (ASSE) · doi:10.1145/3523181.3523209 · Cited by 1 · see citing works
Benchmarking Hardware Accelerating Techniques for Extreme Learning Machine
Li, L., Wang, G., Wu, G., & Zhang, Q. (2019) · Proceedings in adaptation, learning and optimization · doi:10.1007/978-3-030-23307-5_16
Scalable IP Core for Feed Forward Random Networks
Daram, A. R., Paluru, K., Karia, V., & Kudithipudi, D. (2019) · Proceedings in adaptation, learning and optimization · doi:10.1007/978-3-030-23307-5_28
Digital Implementation of OS-ELM for Data Classification in Real-Time
Rout, S. K., & Biswal, P. K. (2020) · Lecture notes in electrical engineering · doi:10.1007/978-981-15-5262-5_24
FPGA Implementation of WRVFLN for Classification
Rout, S. K., Sahani, M., Swain, B. K., & Biswal, P. K. (2020) · IEEE VLSI Device Circuit and System (VLSI DCS) · doi:10.1109/vlsidcs47293.2020.9179940
Aceleração de hardware em sistemas embarcados para aprendizado de máquina utilizando KNN em FPGA
Berbert, W., Bertini, L., & Copetti, A. (2021) · Anais do Computer on the Beach · doi:10.14210/cotb.v12.p400-407
Implemetasi Komputasi Akar Kuadrat Resolusi Tinggi pada Field Programmable Gate Array (FPGA)
Irfan, M., & Setiawan, H. (2022) · Jurnal Teknologi Informasi dan Ilmu Komputer · doi:10.25126/jtiik.2022976756
FPGA Simulation for Computing Pseudoinverse Matrices
Xavier, G. M. T., Nava, L. M. F., Castañeda, F. G., & Cadenas, J. A. M. (2023) · International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE) · doi:10.1109/cce60043.2023.10332880
Hardware Implementation of MRO-ELM for Online Sequential Learning on FPGA
Polat, Ö., & Kayhan, S. K. (2023) · Communications in computer and information science · doi:10.1007/978-3-031-50920-9_3
FPGA based Matrix Multiplication Accelerator
Deb, P., Valles, D., & Aslan, S. (2025) · International Conference on Computer, Information and Telecommunication Systems · doi:10.1109/cits65975.2025.11099187
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Castañeda, F. G., Solano, L. E. S., & Flores-Nava, L. M. (2025) · Engineering Research Express · doi:10.1088/2631-8695/ae0c58
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Weber, T. O., & Cabrera, F. L. (2025) · Symposium on Integrated Circuits and Systems Design · doi:10.1109/sbcci66862.2025.11218646
- Authors
- Frances-Villora, J. V., Rosado-Muñoz, A., Martínez-Villena, J. M., Bataller-Mompean, M., Guerrero, J. F., & Wegrzyn, M.
- Affiliations
- Universitat de València (ES)
- Corresponding author
- Rosado-Muñoz, A.
- Venue
- Computers & Electrical Engineering
- Publisher
- Elsevier BV
- Published
- 2016-04
- Volume
- 51
- Pages
- 139-156
- ISSN
- 0045-7906 (ISSN-L)
- OpenAlex
- W2276069931
- Cited by
- 49
- References
- 32
- Citations by year
- 2025: 3 · 2023: 2 · 2022: 3 · 2021: 8 · 2020: 8 · 2019: 11 · 2018: 8 · 2017: 6
- FWCI
- 6.87
- Type
- journal article
- Language
- en
- Open access
- closed
- Locations
- Computers & Electrical Engineering (publishedVersion)
- Topics
- Physical Sciences › Computer Science › Artificial Intelligence › Machine Learning and ELM
- Physical Sciences › Computer Science › Hardware and Architecture › Embedded Systems Design Techniques
- Physical Sciences › Computer Science › Artificial Intelligence › Neural Networks and Applications
- Keywords
- extreme learning machine, FPGA implementation, hardware architecture, real-time training, parallel hardware architecture, IP core, resource utilization, power consumption, precision analysis, single-layer feedforward neural network
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