CMOL implementation of spiking neurons and spike-timing dependent plasticity
Abstract
Abstract Successful implementation of spiking neural networks onto CMOS‐Molecular (CMOL) architecture has already been proposed, but the ability of dynamic learning has not yet been addressed. Here, we propose a spiking neural topology with spike‐timing‐dependent learning ability and provide its basic building blocks that are easily mapped onto CMOL architecture. The learning method modifies state of synaptic switches, using spatially and temporally local information which is available at the synapse when state modification is performed. The performance of the proposed topology is analyzed with regards to pre‐ and post‐synaptic spike timing, and simulation results are provided for a synapse with spike‐timing‐dependent plasticity properties. Furthermore, its performance as spike‐timing correlation learning and synchrony detection in a small feed‐forward network is demonstrated as a case example. Copyright © 2010 John Wiley & Sons, Ltd.
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ELM is typically used in single-layer feedforward neural networks.
“ELM is typically used in single layer feedforward neural (SLFN) networks [56].”
From Embedded Intelligence on FPGA: Survey, Applications and Challenges (2021) · cites this paper as [56]
Cites
Bi, G.-Q., & Poo, M.-M. (1998) · The Journal of Neuroscience · doi:10.1523/jneurosci.18-24-10464.1998 · Cited by 4,744 · see citing works
Regulation of Synaptic Efficacy by Coincidence of Postsynaptic APs and EPSPs
Markram, H., Lübke, J., Frotscher, M., & Sakmann, B. (1997) · Science · doi:10.1126/science.275.5297.213 · Cited by 3,832 · see citing works
Networks of spiking neurons: The third generation of neural network models
Maass, W. (1997) · Neural Networks · doi:10.1016/s0893-6080(97)00011-7 · Cited by 3,551 · see citing works
Gerstner, W., & Kistler, W. M. (2002) · Cambridge University Press eBooks · doi:10.1017/cbo9780511815706 · Cited by 3,120 · see citing works
Competitive Hebbian learning through spike-timing-dependent synaptic plasticity
Song, S., Miller, K. D., & Abbott, L. F. (2000) · Nature Neuroscience · doi:10.1038/78829 · Cited by 2,738 · see citing works
Which Model to Use for Cortical Spiking Neurons?
Izhikevich, E. M. (2004) · IEEE Transactions on Neural Networks · doi:10.1109/tnn.2004.832719 · Cited by 2,555 · see citing works
(1998) · The MIT Press eBooks · doi:10.7551/mitpress/5704.001.0001 · Cited by 1,129 · see citing works
Indiveri, G., Chicca, E., & Douglas, R. (2006) · IEEE Transactions on Neural Networks · doi:10.1109/tnn.2005.860850 · Cited by 1,009 · see citing works
Debanne, D., Gähwiler, B. H., & Thompson, S. M. (1998) · The Journal of Physiology · doi:10.1111/j.1469-7793.1998.237bu.x · Cited by 579 · see citing works
CMOL FPGA: a reconfigurable architecture for hybrid digital circuits with two-terminal nanodevices
Strukov, D. B., & Likharev, K. K. (2005) · Nanotechnology · doi:10.1088/0957-4484/16/6/045 · Cited by 506 · see citing works
Introducing Molecular Electronics
Cuniberti, G., Richter, K., & Fagas, G. (2006) · Springer eBooks · doi:10.1007/b101525 · Cited by 372 · see citing works
Nano/CMOS architectures using a field-programmable nanowire interconnect
Snider, G. S., & Williams, R. S. (2007) · Nanotechnology · doi:10.1088/0957-4484/18/3/035204 · Cited by 364 · see citing works
Spike-timing-dependent learning in memristive nanodevices
Snider, G. S. (2008) · 2008 IEEE International Symposium on Nanoscale Architectures · doi:10.1109/nanoarch.2008.4585796 · Cited by 341 · cited 1× · see citing works
“Using a non-flexible but a practical version of CMOL architecture which uses ‘memristive’ nanodevices in place of molecular switches, Snider has proposed a self-organized computation [2] and STDP learning [17] with continuous weight synapse in a synchronous paradigm.”
MethodIzhikevich, E. M., & Desai, N. S. (2003) · Neural Computation · doi:10.1162/089976603321891783 · Cited by 319 · see citing works
On the computational power of circuits of spiking neurons
Maass, W., & Markram, H. (2004) · Journal of Computer and System Sciences · doi:10.1016/j.jcss.2004.04.001 · Cited by 295 · see citing works
Self-organized computation with unreliable, memristive nanodevices
Snider, G. S. (2007) · Nanotechnology · doi:10.1088/0957-4484/18/36/365202 · Cited by 264 · see citing works
Nanowire-based programmable architectures
DeHon, A. M. (2005) · ACM Journal on Emerging Technologies in Computing Systems · doi:10.1145/1084748.1084750 · Cited by 250 · see citing works
Chicca, E., Badoni, D., Dante, V., D'Andreagiovanni, M., Salina, G., Carota, L., Fusi, S., & Giudice, P. D. (2003) · IEEE Transactions on Neural Networks · doi:10.1109/tnn.2003.816367 · Cited by 211 · see citing works
Masoumi, M., Raissi, F., Ahmadian‐Attari, M., & Keshavarzi, P. (2005) · Nanotechnology · doi:10.1088/0957-4484/17/1/015 · Cited by 182 · see citing works
Self-citationKistler, W. M., & van Hemmen, J. L. (2000) · Neural Computation · doi:10.1162/089976600300015844 · Cited by 160 · see citing works
Neuromorphic architectures for nanoelectronic circuits
Türel, Ö., Lee, J. H., Ma, X., & Likharev, K. K. (2004) · International Journal of Circuit Theory and Applications · doi:10.1002/cta.282 · Cited by 116 · see citing works
Prospects for terabit-scale nanoelectronic memories
Strukov, D. B., & Likharev, K. K. (2004) · Nanotechnology · doi:10.1088/0957-4484/16/1/028 · Cited by 114 · see citing works
Classical and Instrumental Learning by Neural Networks
Grossberg, S. (1974) · Elsevier eBooks · doi:10.1016/b978-0-12-543103-3.50009-2 · Cited by 103 · see citing works
How the Shape of Pre- and Postsynaptic Signals Can Influence STDP: A Biophysical Model
Saudargienė, A., Porr, B., & Wörgötter, F. (2004) · Neural Computation · doi:10.1162/089976604772744929 · Cited by 74 · see citing works
CrossNets: possible neuromorphic networks based on nanoscale components
Türel, Ö., & Likharev, K. K. (2003) · International Journal of Circuit Theory and Applications · doi:10.1002/cta.223 · Cited by 59 · see citing works
Defect‐tolerant nanoelectronic pattern classifiers
Lee, J. H., & Likharev, K. K. (2007) · International Journal of Circuit Theory and Applications · doi:10.1002/cta.410 · Cited by 53 · see citing works
STDP implementation using memristive nanodevice in CMOS-Nano neuromorphic networks
Afifi, A., Ayatollahi, A., & Raissi, F. (2009) · IEICE Electronics Express · doi:10.1587/elex.6.148 · Cited by 53 · see citing works
Self-citationCortical Models Onto CMOL and CMOS— Architectures and Performance/Price
Gao, C., & Hammerstrom, D. W. (2007) · IEEE Transactions on Circuits and Systems I Regular Papers · doi:10.1109/tcsi.2007.907830 · Cited by 50 · see citing works
Time‐mode circuits for analog computation
Ravinuthula, V., Garg, V., Harris, J. G., et al. (2008) · International Journal of Circuit Theory and Applications · doi:10.1002/cta.488 · Cited by 37 · see citing works
CMOL CrossNets as Pattern Classifiers
Lee, J. H., & Likharev, K. K. (2005) · Lecture notes in computer science · doi:10.1007/11494669_55 · Cited by 23 · see citing works
Towards a circuit theory for metallic single‐electron tunnelling devices
Hoekstra, J. (2007) · International Journal of Circuit Theory and Applications · doi:10.1002/cta.412 · Cited by 17 · see citing works
On circuit models for quantum‐classical networks
Csurgay, Á. I. (2007) · International Journal of Circuit Theory and Applications · doi:10.1002/cta.444 · Cited by 16 · see citing works
Stochastic bitstream‐based CNN and its implementation on FPGA
Rák, Á., Soós, B. G., & Cserey, G. (2008) · International Journal of Circuit Theory and Applications · doi:10.1002/cta.569 · Cited by 14 · see citing works
Gorchetchnikov, A., Versace, M., & Hasselmo, M. E. (2005) · Neural Networks · doi:10.1016/j.neunet.2005.06.019 · Cited by 10 · see citing works
Function‐in‐layout: a demonstration with bio‐inspired hyperacuity chip
Mozsáry, A., Chung, J., & Roska, T. (2006) · International Journal of Circuit Theory and Applications · doi:10.1002/cta.385 · Cited by 8 · see citing works
Analysis of the interaction between the retinal ON and OFF channels using CNN‐UM models
Wagner, R., Molnar, A., & Werblin, F. S. (2008) · International Journal of Circuit Theory and Applications · doi:10.1002/cta.498 · Cited by 8 · see citing works
Sasaki, K., Morie, T., & Iwata, A. (2006) · IEICE Transactions on Electronics · doi:10.1093/ietele/e89-c.11.1637 · Cited by 5 · see citing works
CMOL-Based Cellular Neural Networks and Parallel Processor for Future Image Processing
Zhang, W., & Wu, N. (2008) · IEEE Conference on Nanotechnology (IEEE NANO) · doi:10.1109/nano.2008.221 · Cited by 3 · see citing works
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Embedded Intelligence on FPGA: Survey, Applications and Challenges
Seng, K. P., Lee, P. J., & Ang, L. M. (2021) · Electronics · doi:10.3390/electronics10080895 · Cited by 105 · see citing works
“ELM is typically used in single layer feedforward neural (SLFN) networks [56].”
MethodFrances-Villora, J. V., Rosado-Muñoz, A., Martínez-Villena, J. M., Bataller-Mompean, M., Guerrero, J. F., & Wegrzyn, M. (2016) · Computers & Electrical Engineering · doi:10.1016/j.compeleceng.2016.02.007 · Cited by 49 · see citing works
- Authors
- Afifi, A., Ayatollahi, A., & Raissi, F.
- Affiliations
- Iran University of Science and Technology (IR)
- K. N. Toosi University of Technology (IR)
- Corresponding author
- Afifi, Ahmad
- Venue
- International Journal of Circuit Theory and Applications
- Publisher
- Wiley
- Published
- 2011-04
- Volume
- 39
- Issue
- 4
- Pages
- 357-372
- ISSN
- 0098-9886 (ISSN-L)
- 1097-007X
- OpenAlex
- W2042457568
- Cited by
- 13
- References
- 38
- Citations by year
- 2021: 1 · 2017: 1 · 2016: 2 · 2015: 2 · 2014: 2 · 2012: 2
- FWCI
- 1.01
- Type
- journal article
- Language
- en
- Open access
- closed
- Locations
- International Journal of Circuit Theory and Applications (publishedVersion)
- Topics
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Advanced Memory and Neural Computing
- Life Sciences › Neuroscience › Cognitive Neuroscience › Neural dynamics and brain function
- Physical Sciences › Engineering › Biomedical Engineering › Analog and Mixed-Signal Circuit Design
- Keywords
- spiking neurons, spike-timing-dependent plasticity, dynamic learning, spiking neural networks, feedforward neural networks
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