The DOI matches its Crossref record; 22 of the 22 references it cites were found in a registry or an index.
CMOL FPGA: a reconfigurable architecture for hybrid digital circuits with two-terminal nanodevices
Open accessAbstract
This paper describes a digital logic architecture for 'CMOL' hybrid circuits which combine a semiconductor–transistor (CMOS) stack and two levels of parallel nanowires, with molecular-scale nanodevices formed between the nanowires at every crosspoint. This cell-based, field-programmable gate array (FPGA)-like architecture is based on a uniform, reconfigurable CMOL fabric, with four-transistor CMOS cells and two-terminal nanodevices ('latching switches'). The switches play two roles: they provide diode-like I – V curves for logic circuit operation, and allow circuit mapping on CMOL fabric and its reconfiguration around defective nanodevices. Monte Carlo simulations of two simple circuits (a 32-bit integer adder and a 64-bit full crossbar switch) have shown that the reconfiguration allows one to increase the circuit yield above 99% at the fraction of bad nanodevices above 20%. Estimates have shown that at the same time the circuits may have extremely high density (approximately 500 times higher than that of the usual CMOS FPGAs with the same design rules), while operating at higher speed at acceptable power consumption.
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Cites
Introduction to Solid State Physics
Kittel, C., & Fan, H. Y. (1957) · American Journal of Physics · doi:10.1119/1.1934457 · Cited by 22,240
Introduction to Solid State Physics
Kittel, C., & Dexter, D. L. (1953) · American Journal of Physics · doi:10.1119/1.1933590 · Cited by 13,240
Introduction to V.L.S.I. Systems
Mead, C. (1981) · IEE Proceedings I Solid State and Electron Devices · doi:10.1049/ip-i-1.1981.0010 · Cited by 3,720
Probabilistic Logic and the Synthesis of Reliable Organisms from Unreliable Components
von Neumann, J. (1956) · Cited by 1,652
Rabaey, J. M., Chandrakasan, A. P., & Nikolić, B. (1995) · Cited by 1,425
Architecture and CAD for Deep-Submicron FPGAS
Betz, V., Rose, J., & Marquardt, A. (1999) · Springer eBooks · doi:10.1007/978-1-4615-5145-4 · Cited by 1,352
Ayers, J. E. (2003) · CRC Press eBooks · doi:10.1201/9780429258404 · Cited by 906
A Defect-Tolerant Computer Architecture: Opportunities for Nanotechnology
Heath, J. R., Kuekes, P. J., Snider, G. S., & Williams, R. S. (1998) · Science · doi:10.1126/science.280.5370.1716 · Cited by 889
Field-Programmable Gate Arrays
Brown, S. D., Francis, R. J., Rose, J., & Vranesic, Z. G. (1992) · Springer eBooks · doi:10.1007/978-1-4615-3572-0 · Cited by 529
Theory of single-electron charging of quantum wells and dots
Averin, D. V., Korotkov, A. N., & Likharev, K. K. (1991) · Physical Review B · doi:10.1103/physrevb.44.6199 · Cited by 454
Self-citation
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Waser, R., Dittmann, R., Staikov, G., & Szot, K. (2009) · Advanced Materials · doi:10.1002/adma.200900375 · Cited by 5,080
Memristive devices for computing
Yang, J. J., Strukov, D. B., & Stewart, D. R. (2013) · Nature Nanotechnology · doi:10.1038/nnano.2012.240 · Cited by 3,885
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Pershin, Y. V., & Di Ventra, M. (2011) · Advances In Physics · doi:10.1080/00018732.2010.544961 · Cited by 823
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Metadata
- Authors
- Strukov, D. B., & Likharev, K. K.
- Venue
- Nanotechnology
- Publisher
- IOP Publishing
- Published
- 2005-04-19
- Volume
- 16
- Issue
- 6
- Pages
- 888-900
- ISSN
- 0957-4484 (ISSN-L)
- 1361-6528
- OpenAlex
- W2137249916
- Cited by
- 503
- References
- 22
- FWCI
- 42.58
- Type
- journal article
- Language
- en
- Open access
- bronze
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- Strukov, D. B., & Likharev, K. K. (2005). CMOL FPGA: a reconfigurable architecture for hybrid digital circuits with two-terminal nanodevices. Nanotechnology. https://doi.org/10.1088/0957-4484/16/6/045
Data sources
Bibliographic data: Semantic Scholar, OpenAlex, Crossref.
Contains information from the Semantic Scholar Academic Graph Datasets, made available under the ODC Attribution License (ODC-BY 1.0).
Semantic Scholar’s data is described in: Kinney, R., et al. (2023). The Semantic Scholar Open Data Platform. arXiv:2301.10140.
