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High-voltage double-implanted power MOSFET's in 6H-SiC
Abstract
We report on the first planar high-voltage MOSFET's in 6H-SiC. A double-implant MOS (DIMOS) process is used. The planar structure ameliorates the high-field stressing encountered by SiC UMOS transistors fabricated by other groups. Blocking mode operation of up to 760 V is demonstrated, which is nearly three times higher than previously reported operating voltages for SiC MOSFET's.
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Citations
Cited by
Material Science and Device Physics in SiC Technology for High-Voltage Power Devices
Kimoto, T. (2015) · Japanese Journal of Applied Physics · doi:10.7567/jjap.54.040103 · Cited by 1,176
Characterization, Modeling, and Application of 10-kV SiC MOSFET
Wang, J., Zhao, T., Li, J., Huang, A. Q., Callanan, R., Husna, F., & Agarwal, A. (2008) · IEEE Transactions on Electron Devices · doi:10.1109/ted.2008.926650 · Cited by 398
A Critical Review on Reliability and Short Circuit Robustness of Silicon Carbide Power MOSFETs
Sreejith, S., Ajayan, J., Devasenapati, S. B., Sivasankari, B., & Tayal, S. (2023) · Silicon · doi:10.1007/s12633-022-02039-1 · Cited by 11
Metadata
- Authors
- Shenoy, J. N., Cooper, J. A., & Melloch, M. R.
- Venue
- IEEE Electron Device Letters
- Published
- 1997-03
- Volume
- 18
- Issue
- 3
- Pages
- 93-95
- ISSN
- 0741-3106 (ISSN-L)
- 1558-0563
- OpenAlex
- W2156651960
- Cited by
- 243
- References
- 0
- FWCI
- 30.66
- Type
- journal article
- Language
- en
- Open access
- closed
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- CoChat. (2026). Citation check: High-voltage double-implanted power MOSFET's in 6H-SiC. https://app.cochat.ai/papers/10.1109/55.556091
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- Shenoy, J. N., Cooper, J. A., & Melloch, M. R. (1997). High-voltage double-implanted power MOSFET's in 6H-SiC. IEEE Electron Device Letters. https://doi.org/10.1109/55.556091
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Contains information from the Semantic Scholar Academic Graph Datasets, made available under the ODC Attribution License (ODC-BY 1.0).
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