Cited by 5Distributed systems and fault toleranceRadiation Effects in ElectronicsReal-Time Systems Scheduling

The DOI matches its Crossref record; 19 of the 19 references it cites were found in a registry or an index.

Increasing the Efficiency and Efficacy of Selective-Hardening for Parallel Applications

Oliveira, Daniel, Navaux, Philippe, Rech, Paolo·2019·2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)

Abstract

Selective hardening is a promising solution to efficiently improve the reliability of high performance and safety-critical real-time applications. One of the most significant challenges of selective hardening is to choose how many resources or code portions to protect to avoid unnecessary system performances degradation (at least 2x overhead for the naive duplication). In this paper, we propose a selective hardening strategy for parallel algorithms. We first identify through extensive fault-injection campaigns the code portions whose protection significantly increases the algorithm reliability. Then, we select the code portions that, once protected, maximize the reliability/overhead ratio. We can achieve fault coverage as high as 60% with a 3% overhead. We show that the hardening efficiency can be higher than 90% when compared to naive full duplication.

Overview

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Registry

Crossref · 10.1109/dft.2019.8875300

Cites

19 of 19 references verified0 citation errors · 0 not checkable

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  • The solution is flexible, allowing the framework to integrate a different FI tool based on the adopted development environment to produce error models required to support FES.

    “The solution we designed is flexible, allowing the framework to integrate a different FI tool (for instance the recent [22], [23] and new ones that will emerge), based on the adopted development environment, to produce the error models required to support the FES appropriately.”

Citations

Cites

Flagged first, then by citations

Research works printed but not linked: 4

  1. 2019, Fault injector results
  2. hari, 0, SASSIFI: Evaluating Resilience of GPU Applications, 5th IEEE Workshop on Silicon Errors in Logic - System Effects (SELSE)
  3. research, 0, Scientific Discovery through Advanced Computing-The Challenges of Exascale
  4. mitra, 0, System-Level Single-Event Effects, IEEE Nuclear and Space Radiation Effects Conference NSREC 2012 Short Course

Cited by

Sorted by citations

  • Fast and Accurate Error Simulation for CNNs Against Soft Errors

    Bolchini, C., Cassano, L., Miele, A., & Toschi, A. (2023) · IEEE Transactions on Computers · doi:10.1109/tc.2022.3184274 · Cited by 1

    “The solution we designed is flexible, allowing the framework to integrate a different FI tool (for instance the recent [22], [23] and new ones that will emerge), based on the adopted development environment, to produce the error models required to support the FES appropriately.”
    BackgroundMethodInfluential

Metadata

Authors
Oliveira, D., Navaux, P., & Rech, P.
Affiliations
  • Universidade Federal do Paraná (BR)
  • Universidade Federal do Rio Grande do Sul (BR)
Venue
2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)
Publisher
IEEE
Published
2019-10
Pages
1-6
ISSN
1550-5774 (ISSN-L)
OpenAlex
W2981846734
Cited by
5
References
19
Citations by year
2025: 1 · 2023: 1 · 2022: 2 · 2020: 1
FWCI
0.65
Type
conference paper
Language
en
Open access
closed
Locations
  • Proceedings (publishedVersion)
  • Iris (University of Trento) (submittedVersion)
Topics
  • Physical Sciences › Computer Science › Computer Networks and Communications › Distributed systems and fault tolerance
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › Radiation Effects in Electronics
  • Physical Sciences › Computer Science › Hardware and Architecture › Real-Time Systems Scheduling
Keywords
selective hardening, fault tolerance, parallel algorithms, fault injection, code duplication, safety-critical real-time systems, fault coverage

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