Auto-ViT-Acc: An FPGA-Aware Automatic Acceleration Framework for Vision Transformer with Mixed-Scheme Quantization
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Vision transformers (ViTs) are emerging with significantly improved accuracy in computer vision tasks. However, their complex architecture and enormous computation/storage demand impose urgent needs for new hardware accelerator design methodology. This work proposes an FPGA-aware automatic ViT acceleration framework based on the proposed mixed-scheme quantization. To the best of our knowledge, this is the first FPGA-based ViT acceleration framework exploring model quantization. Compared with state-of-the-art ViT quantization work (algorithmic approach only without hardware acceleration), our quantization achieves 0.47% to 1.36% higher Top-l accuracy under the same bit-width. Compared with the 32-bit floating-point baseline FPGA accelerator, our accelerator achieves around 5.6x improvement on the frame rate (i.e., 56.8 FPS vs. 10.0 FPS) with 0.71% accuracy drop on ImageNet dataset for DeiT-base.
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HeatViT and Auto-ViT-Acc fail to consider the inherent data distribution within ViTs, resulting in inconsistencies between the quantization strategy and the data distribution.
“HeatViT and Auto-ViT-Acc fail to consider the inherent data distribution within ViTs, resulting in inconsistencies between the quantization strategy and the data distribution.”
From EQ-ViT: Algorithm-Hardware Co-Design for End-to-End Acceleration of Real-Time Vision Transformer Inference on Versal ACAP Architecture (2024) · cites this paper as [41]
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Xu, L., & Shi, W. (2025) · Wiley eBooks · doi:10.1002/9781394285860.ch4
An FPGA Accelerator for Vision Transformer with Quantization and LUT-Based Operations
Cheng, X., Kan, Y., Zhang, R., & Nakashima, Y. (2025) · IEICE Transactions on Information and Systems · doi:10.1587/transinf.2025pap0003
SynGPU: Synergizing CUDA and Bit-Serial Tensor Cores for Vision Transformer Acceleration on GPU
Yao, Y., Zhang, C., Qi, C., Chen, R., Wang, J., Fu, Z., Jing, N., Liang, X., & Song, Z. (2025) · ACM/IEEE Design Automation Conference (DAC) · doi:10.1109/dac63849.2025.11132753
Coronel-Reyes, J., Triviño-Sanchez, J. J., Villamar-Barros, H., Sánchez-Fernández, R., & Sarango, A. F. H. (2025) · Communications in computer and information science · doi:10.1007/978-3-032-11494-5_1
A 1.784 TOPS Multi-Data-Type Multi-Data-Flow Transformer Accelerator for Object Recognition
Cheng, Q., & Hashimoto, M. (2025) · IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA) · doi:10.1109/icta68203.2025.11329765
PipeViT: Accelerating Vision Transformers via Intra-Layer Pipelining
Zhou, X., Xu, Y. E., Lu, H., Yu, J., & Wang, K. (2026) · Asia and South Pacific Design Automation Conference (ASP-DAC) · doi:10.1109/asp-dac66049.2026.11420796
MoEA: A Mixed-Precision Edge Accelerator for CNN-MSA Models with Fine-Tuning Support
Dang, Q., Ma, C., Huo, Z., Yang, G., Xia, T., Zhao, W., & Ren, P. (2026) · Asia and South Pacific Design Automation Conference (ASP-DAC) · doi:10.1109/asp-dac66049.2026.11420594
Refining Datapath for Microscaling ViTs
Xiao, C., Cheng, J., & Zhao, Y. (2025) · International Conference on Field Programmable Logic and Applications (FPL) · doi:10.1109/fpl68686.2025.00044
Kim, N. J., Kang, B. J., Lee, H. I., Yoon, S., Kim, Y., Han, S., Ko, S., & Kim, H. (2026) · IEEE Transactions on Neural Networks and Learning Systems · doi:10.1109/tnnls.2026.3677427
FASTR: FPGA-based Acceleration of Hierarchical Foundation Models for SAR ATR
Wickramasinghe, S., Raghavendra, C. S., & Prasanna, V. K. (2026) · IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM) · doi:10.1109/fccm68464.2026.00042
harDyT: A Post-Training Hardware-Aware LayerNorm Replacement
Gauthier, L., Bony, F., & Perchoux, J. (2026) · IEEE International Symposium on Circuits and Systems proceedings · doi:10.1109/iscas66217.2026.11562110
HMix : An Efficient Hardware Accelerator for Quantized MLP-Mixer Inference
Shyam, D. R. T., Nag, S., & John, L. K. (2026) · ACM International Conference on Computing Frontiers (CF) · doi:10.1145/3801487.3801834
DMPQ: MSA and MLP Decoupled Mixed-Precision Post-Training Quantization for Vision Transformers
Qin, X., Wang, X., & Du, X. (2026) · Lecture notes in computer science · doi:10.1007/978-981-92-3410-3_16
A Dynamically Manageable FPGA Accelerator with Stable Performance Profile for Vision TransformersPreprint
Li, H., Ye, W. J., Zhou, X. Y., & Li, K. (2026) · SSRN Electronic Journal · doi:10.2139/ssrn.7150953
Chen, J. Y., H, W., Li, Y., Ren, W., Li, B., Wang, H., Zhang, X., & Sun, H. (2026) · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · doi:10.1109/tvlsi.2026.3712452
Self-citationTowards Energy-Efficient Underwater Visual Perception via an FPGA Accelerator of Vision Transformers
Liu, Y., Li, Q., Huo, F., Xu, H., & Zheng, H. (2026) · MTS/IEEE OCEANS Conference (OCEANS) · doi:10.1109/oceans66983.2026.11617118
Analysis of Research Progress on Deployment Methods for Deep Learning Models on FPGAs
Wang, S., Chen, L., Tian, C., Zhou, J., Zhang, Y., & Cao, Y. (2026) · Electronics · doi:10.3390/electronics15163536
A Fully Sparse Transformer Accelerator With Hybrid-Grained Pipeline for 3-D Object Detection
Zhang, Q., Xu, X., & Alzaher, H. A. (2026) · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · doi:10.1109/tvlsi.2026.3718513
Exploring the Application of AWQ in Vision Transformers on FPGA Accelerators
Cao, Y., Wang, S., Tian, C., Chen, L., Zhang, Y., Wang, Z., & Xue, Z. (2026) · IEEE International Conference on Information Technology, Big Data and Artificial Intelligence (ICIBA) · doi:10.1109/iciba68339.2026.11651876
Self-citationWang, Y., Liu, J., Huang, W., Li, Q., Mai, T., & Li, K. (2026) · Lecture notes in computer science · doi:10.1007/978-981-92-4805-6_23
A Multi-Role Unified Buffer Architecture for an On-Device Vision Transformer Accelerator
Park, W., Park, S., & Kim, H. (2026) · IEEE Access · doi:10.1109/access.2026.3734515
Dinh, V. D. A., Thinh, T. N., & Le, L. T. (2026) · Lecture notes in computer science · doi:10.1007/978-981-92-6513-8_38
Thota, G. K., & P.Muralidhar (2026) · IEEE International Conference on Recent Advances in Electronics, Communication, Computing, Automation and Power (RECCAP) · doi:10.1109/reccap69368.2026.11723429
- Authors
- Li, Z., Sun, M., Lu, A., Ma, H., Yuan, G., Xie, Y., Tang, H., Li, Y., Leeser, M., Wang, Z., Lin, X., & Fang, Z.
- Affiliations
- Northeastern University (US)
- Simon Fraser University (CA)
- University of California, Irvine (US)
- ETH Zurich (CH)
- The University of Texas at Austin (US)
- ORCID
- Venue
- 2022 32nd International Conference on Field-Programmable Logic and Applications (FPL)
- Publisher
- IEEE
- Published
- 2022-08
- Pages
- 109-116
- OpenAlex
- W4321637298
- Cited by
- 85
- References
- 27
- Citations by year
- 2026: 20 · 2025: 22 · 2024: 28 · 2023: 14 · 2022: 1
- FWCI
- 5.66
- Type
- conference paper
- Language
- en
- Open access
- green
- arxiv.org
- Locations
- International Conference on Field Programmable Logic and Applications (FPL) (publishedVersion)
- arXiv (Cornell University) (submittedVersion)
- arXiv (Cornell University)
- Funders
- NSF (CCF-1901378)
- Topics
- Physical Sciences › Computer Science › Computer Vision and Pattern Recognition › Advanced Neural Network Applications
- Physical Sciences › Computer Science › Hardware and Architecture › Embedded Systems Design Techniques
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Embedded Systems and FPGA Applications
- Keywords
- vision transformer, FPGA accelerator, model quantization, hardware acceleration, DeiT, ImageNet, frame rate improvement, bit-width reduction
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Registry, retraction, Cites and statistics results are computed, not judged, with one exception: a printed reference that no index lists is read once by a model before it counts as a citation error. Claims are extracted by a model and kept only when their quote appears verbatim in the text; each cited source is then checked, with a model’s help, for whether it says what the claim relies on. Those verdicts can be wrong — read the claim’s quote and the cited source before relying on one.
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