The DOI matches its Crossref record; 35 of the 36 references it cites were found in a registry or an index.
An Overview of FPGA Based Deep Learning Accelerators: Challenges and Opportunities
Abstract
With the rapid development of in-depth learning, neural network and deep learning algorithms have been widely used in various fields, e.g., image, video and voice processing. However, the neural network model is getting larger and larger, which is expressed in the calculation of model parameters. Although a wealth of existing efforts on GPU platforms currently used by researchers for improving computing performance, dedicated hardware solutions are essential and emerging to provide advantages over pure software solutions. In this paper, we systematically investigate the neural network accelerator based on Field-Programmable Gate Array(FPGA). Specifically, we respectively review the accelerators designed for specific problems, specific algorithms, algorithm features, and general templates. We also compared the design and implementation of the accelerator based on FPGA under different devices and network models and compared it with the versions of CPU and GPU. Finally, we present to discuss the advantages and disadvantages of accelerators on FPGA platforms and to further explore the opportunities for future research.
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“it requires a lot of time in reconfiguration.”
From Embedded Intelligence on FPGA: Survey, Applications and Challenges (2021) · cites this paper as [88]
In the citing paper
“Although it brings a lot of advantages on flexibility and high parallelism [88]”
From Embedded Intelligence on FPGA: Survey, Applications and Challenges (2021) · cites this paper as [88]
In the citing paper
“In addition, challenges in programming are another increase in cost [88].”
From Embedded Intelligence on FPGA: Survey, Applications and Challenges (2021) · cites this paper as [88]
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Metadata
- Authors
- Wang, T., Wang, C., Zhou, X., & Chen, H.
- Affiliations
- University of Science and Technology of China (CN)
- Venue
- 2019 IEEE 21st International Conference on High Performance Computing and Communications; IEEE 17th International Conference on Smart City; IEEE 5th International Conference on Data Science and Systems (HPCC/SmartCity/DSS)
- Publisher
- IEEE
- Published
- 2019-08
- Pages
- 1674-1681
- OpenAlex
- W2977485436
- Cited by
- 53
- References
- 36
- Citations by year
- 2026: 4 · 2025: 8 · 2024: 5 · 2023: 13 · 2022: 5 · 2021: 8 · 2020: 6 · 2019: 4
- FWCI
- 4.53
- Type
- conference paper
- Language
- en
- Open access
- closed
- Licence
- Locations
- IEEE International Conference on High Performance Computing and Communications; IEEE International Conference on Smart City; IEEE International Conference on Data Science and Systems (HPCC/SmartCity/DSS) (publishedVersion)
- Topics
- Physical Sciences › Computer Science › Hardware and Architecture › Embedded Systems Design Techniques
- Physical Sciences › Computer Science › Computer Vision and Pattern Recognition › Advanced Neural Network Applications
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Embedded Systems and FPGA Applications
- Keywords
- FPGA, deep learning accelerators, neural network hardware, hardware acceleration, model parameter size
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