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A folded-channel MOSFET for deep-sub-tenth micron era
Abstract
Deep-sub-tenth micron MOSFETs with gate length down to 20 nm are reported. To improve the short channel effect immunities, a novel folded channel transistor structure is proposed. The quasi-planar nature of this new variant of the vertical double-gate SOI MOSFETs simplified the fabrication process. The special features of the structure are: (1) a transistor is formed in a vertical ultra-thin Si fin and is controlled by a double-gate, which suppresses short channel effects; (2) the two gates are self-aligned and are aligned to the S/D; (3) S/D is raised to reduce the parasitic resistance; (4) new low-temperature gate or ultra-thin gate dielectric materials can be used because they are deposited after the S/D; and (5) the structure is quasi-planar because the Si fins are relatively short.
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Citations
Cited by
Beyond the conventional transistor
Wong, H.-S. P. (2002) · IBM Journal of Research and Development · doi:10.1147/rd.462.0133 · Cited by 573
Huang, X., Lee, W.-C., Kuo, C., Hisamoto, D., Chang, L., Kedzierski, J., Anderson, E., Takeuchi, H., Choi, Y.-K., Asano, K., et al. (2003) · International Electron Devices Meeting 1999. Technical Digest (Cat. No.99CH36318) · doi:10.1109/iedm.1999.823848 · Cited by 371
Self-citationDonor deactivation in silicon nanostructures
Björk, M. T., Schmid, H., Knoch, J., Riel, H., & Riess, W. (2009) · Nature Nanotechnology · doi:10.1038/nnano.2008.400 · Cited by 332
Ultimately thin double-gate SOI MOSFETs
Ernst, T., Cristoloveanu, S., Ghibaudo, G., Ouisse, T., Horiguchi, S., Ono, Y., Takahashi, Y., & Murase, K. (2003) · IEEE Transactions on Electron Devices · doi:10.1109/ted.2003.811371 · Cited by 245
Metadata
- Authors
- Hisamoto, D., Lee, W.-C., Kedzierski, J., Anderson, E., Takeuchi, H., Asano, K., King, T.-J., Bokor, J., & Hu, C.
- Venue
- International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217)
- Publisher
- IEEE
- Published
- 2002-11-27
- Pages
- 1032-1034
- ISSN
- 0163-1918 (ISSN-L)
- OpenAlex
- W2542028439
- Cited by
- 251
- References
- 0
- FWCI
- 13.89
- Type
- conference paper
- Language
- en
- Open access
- closed
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- Hisamoto, D., Lee, W.-C., Kedzierski, J., Anderson, E., Takeuchi, H., Asano, K., King, T.-J., Bokor, J., & Hu, C. (2002). A folded-channel MOSFET for deep-sub-tenth micron era. International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217). https://doi.org/10.1109/iedm.1998.746531
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