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Ultimately thin double-gate SOI MOSFETs
Abstract
The operation of 1-3 nm thick SOI MOSFETs, in double-gate (DG) mode and single-gate (SG) mode (for either front or back channel), is systematically analyzed. Strong interface coupling and threshold voltage variation, a large influence of substrate depletion underneath the buried oxide, the absence of drain current transients, and degradation in electron mobility are typical effects in these ultra-thin MOSFETs. The comparison of SG and DG configurations demonstrates the superiority of DG-MOSFETs: ideal subthreshold swing and remarkably improved transconductance (consistently higher than twice the value in SG-MOSFETs). The experimental data and the difference between SG and DG modes is explained by combining classical models with quantum calculations. The key effect in ultimately thin DG-MOSFETs is volume inversion, which primarily leads to an improvement in mobility, whereas the total inversion charge is only marginally modified.
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In the UTB, an entire body is essentially controlled by the primary gate, providing abnormal properties such as volume inversion carriers.
“In the UTB, an entire body is essentially controlled by the primary gate, providing abnormal properties, such as the volume inversion carriers2122.”
From Performance Enhancement of Capacitive-Coupling Dual-gate Ion-Sensitive Field-Effect Transistor in Ultra-Thin-Body (2014) · cites this paper as [22]
The UTB enables the two curves of a superimposed plot of VS versus and versus the primary gate bias (VP) to coincide.
“Additionally, the UTB enables the two curves of a superimposed plot of VS versus and versus the primary gate bias (VP) to coincide2122.”
From Performance Enhancement of Capacitive-Coupling Dual-gate Ion-Sensitive Field-Effect Transistor in Ultra-Thin-Body (2014) · cites this paper as [22]
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Research works printed but not linked: 50
- 10.1109/55.260792 · DOI
- 10.1109/16.817579 · DOI
- fiegna, 1999, single- and double-gate soi mos structures for future ulsi: a simulation study, Future Trends in Microelectronics, 115
- 10.1109/16.669557 · DOI
- 10.1007/978-3-7091-6827-1_33 · DOI
- ouisse, 1994, self-consistent quantum-mechanical calculations in ultrathin silicon-on-insulator structures, Journal of Applied Physics, 76, 5979, 10.1063/1.358382 · DOI
- 10.1063/1.371763 · DOI
- 10.1109/16.669563 · DOI
- 10.1063/1.371684 · DOI
- 10.1109/SOI.1999.819868 · DOI
- 10.1109/16.841236 · DOI
- mastrapasqua, 2001, measurements of low field mobility in ultra-thin soi n- and p-mosfet's, Silicon-on-Insulator Technology and Devices X Electrochem Soc Proc, 2001–3, 97
- 10.1016/0749-6036(90)90290-N · DOI
- 10.1109/16.141237 · DOI
- cristoloveanu, 1995, Electrical Characterization of SOI Materials and Devices
- 10.1109/16.777154 · DOI
- lim, 1983, threshold voltage of thin-film silicon-on-insulator (soi) mosfet's, IEEE Transn Electron Devices, 30, 1244, 10.1109/T-ED.1983.21282 · DOI
- 10.1109/16.981219 · DOI
- 10.1109/16.337457 · DOI
- 10.1049/el:19880369 · DOI
- 10.1016/S0921-4526(98)00302-0 · DOI
- 10.1109/IEDM.2001.979536 · DOI
- 10.1016/S0038-1101(01)00207-6 · DOI
- 10.1109/55.568758 · DOI
- 10.1109/EDL.1987.26677 · DOI
- 10.1109/55.285411 · DOI
- 10.1109/16.81634 · DOI
- 10.1109/55.541764 · DOI
- 10.1109/IEDM.1997.650416 · DOI
- 10.1109/IEDM.1998.746531 · DOI
- huang, 1999, sub 50-nm finfet: pmos, IEDM Tech Dig, annex
- lee, 1999, super self-aligned double-gate (ssdg) mosfet's utilizing oxidation rate difference and selective epitaxy, IEDM Tech Dig, 71
- 10.1109/IEDM.1992.307422 · DOI
- 10.1109/16.987120 · DOI
- 10.1109/IEDM.1995.499299 · DOI
- 10.1109/55.291592 · DOI
- 10.1109/IEDM.1998.746385 · DOI
- rauly, 1997, short channel effects in sub-0.1 <formula> <tex> $\mu \hbox{m}$</tex></formula> soi-mosfet's, SOI Technology and Devices VIII, 227
- 10.1016/S0038-1101(01)00111-3 · DOI
- colinge, 1997, SOI Technology Materials to VLSI
- gámiz, 2001, monte carlo simulation of electron transport in silicon-on-insulator devices, Silicon-on-Insulator Technology and Devices X Electrochem Soc Proc, 2001–3, 157
- 10.1109/55.841309 · DOI
- 10.1109/55.817444 · DOI
- 10.1109/55.468289 · DOI
- 10.1007/978-94-009-6842-4_13 · DOI
- 10.1002/pssa.2211460231 · DOI
- 10.1063/1.366480 · DOI
- 10.1109/IEDM.1995.499349 · DOI
- 10.1088/0022-3719/15/28/021 · DOI
- 10.1007/978-1-4757-3318-1_2 · DOI
Cited by
Sorted by citations
Jang, H.-J., & Cho, W.-J. (2014) · Scientific Reports · doi:10.1038/srep05284 · Cited by 103
Metadata
- Authors
- Ernst, T., Cristoloveanu, S., Ghibaudo, G., Ouisse, T., Horiguchi, S., Ono, Y., Takahashi, Y., & Murase, K.
- Affiliations
- Centre National de la Recherche Scientifique (FR)
- NTT (Japan) (JP)
- NTT Innovative Devices Corporation (Japan) (JP)
- Venue
- IEEE Transactions on Electron Devices
- Published
- 2003-03
- Volume
- 50
- Issue
- 3
- Pages
- 830-838
- ISSN
- 0018-9383 (ISSN-L)
- OpenAlex
- W2166329620
- Cited by
- 245
- References
- 0
- Citations by year
- 2026: 1 · 2025: 5 · 2024: 5 · 2023: 3 · 2022: 9 · 2021: 5 · 2020: 7 · 2019: 10 · 2018: 13 · 2017: 11 · 2016: 14 · 2015: 12 · 2014: 13 · 2013: 14 · 2012: 9
- FWCI
- 17.73
- Type
- journal article
- Language
- en
- Open access
- closed
- Locations
- IEEE Transactions on Electron Devices (publishedVersion)
- Topics
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Advancements in Semiconductor Devices and Circuit Design
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Semiconductor materials and devices
- Physical Sciences › Materials Science › Materials Chemistry › 2D Materials and Applications
- Keywords
- double-gate MOSFET, single-gate MOSFET, ultra-thin SOI, buried oxide, threshold voltage variation, interface coupling, substrate depletion, electron mobility degradation, subthreshold swing, transconductance, volume inversion, inversion charge, quantum modeling
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