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Write Strategies for 2 and 4-bit Multi-Level Phase-Change Memory
Abstract
We discuss novel multi-level write algorithms for phase change memory which produce highly optimized resistance distributions in a minimum number of program cycles. Using a novel integration scheme, a test array at 4 bits/cell and a 32 kb memory page at 2 bits/cell are experimentally demonstrated.
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Cited by
Resistive switching materials for information processing
Wang, Z., Wu, H., Burr, G. W., Hwang, C. S., Wang, K. L., Xia, Q., & Yang, J. J. (2020) · Nature Reviews Materials · doi:10.1038/s41578-019-0159-3 · Cited by 1,214
Self-citationPhase-change random access memory: A scalable technology
Raoux, S., Burr, G. W., Breitwisch, M. J., Rettner, C. T., Chen, Y.-C., Shelby, R. M., Salinga, M., Krebs, D., Chen, S.-H., Lung, H.-L., et al. (2008) · IBM Journal of Research and Development · doi:10.1147/rd.524.0465 · Cited by 1,010
Self-citationDisorder-induced localization in crystalline phase-change materials
Siegrist, T., Jost, P., Volker, H., Woda, M., Merkelbach, P., Schlockermann, C., & Wuttig, M. (2011) · Nature Materials · doi:10.1038/nmat2934 · Cited by 613
Emerging Memory Technologies: Recent Trends and Prospects
Yu, S., & Chen, P.-Y. (2016) · IEEE Solid-State Circuits Magazine · doi:10.1109/mssc.2016.2546199 · Cited by 555
Phase-Change Technology and the Future of Main Memory
Lee, B. C., Zhou, P., Yang, J., Zhang, Y., Zhao, B., Ipek, E., Mutlu, O., & Burger, D. (2010) · IEEE Micro · doi:10.1109/mm.2010.24 · Cited by 395
Metadata
- Authors
- Nirschl, T., Chen, C.-F., Joseph, E., Lamorey, M., Cheek, R., Chen, S.-H., Zaidi, S., Raoux, S., Chen, Y. C., Zhu, Y., Bergmann, R., Philipp, J. B., Lung, H.-L., Lam, C., Happ, T. D., Burr, G. W., Rajendran, B., Lee, M.-H., Schrott, A., Yang, M., & Breitwisch, M.
- Venue
- 2007 IEEE International Electron Devices Meeting
- Publisher
- IEEE
- Published
- 2007-12
- Pages
- 461-464
- ISSN
- 0163-1918 (ISSN-L)
- OpenAlex
- W2094043668
- Cited by
- 277
- References
- 0
- FWCI
- 93.79
- Type
- conference paper
- Language
- en
- Open access
- closed
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- The paper
- Nirschl, T., Chen, C.-F., Joseph, E., Lamorey, M., Cheek, R., Chen, S.-H., Zaidi, S., Raoux, S., Chen, Y. C., Zhu, Y., Bergmann, R., Philipp, J. B., Lung, H.-L., Lam, C., Happ, T. D., Burr, G. W., Rajendran, B., Lee, M.-H., Schrott, A., . . . Breitwisch, M. (2007). Write Strategies for 2 and 4-bit Multi-Level Phase-Change Memory. 2007 IEEE International Electron Devices Meeting. https://doi.org/10.1109/iedm.2007.4418973
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Bibliographic data: Semantic Scholar, OpenAlex, Crossref.
Contains information from the Semantic Scholar Academic Graph Datasets, made available under the ODC Attribution License (ODC-BY 1.0).
Semantic Scholar’s data is described in: Kinney, R., et al. (2023). The Semantic Scholar Open Data Platform. arXiv:2301.10140.