The DOI matches its Crossref record; 59 of the 59 references it cites were found in a registry or an index.
Emerging Memory Technologies: Recent Trends and Prospects
Abstract
This tutorial introduces the basics of emerging nonvolatile memory (NVM) technologies including spin-transfer-torque magnetic random access memory (STTMRAM), phase-change random access memory (PCRAM), and resistive random access memory (RRAM). Emerging NVM cell characteristics are summarized, and device-level engineering trends are discussed. Emerging NVM array architectures are introduced, including the one-transistor-one-resistor (1T1R) array and the cross-point array with selectors. Design challenges such as scaling the write current and minimizing the sneak path current in cross-point array are analyzed. Recent progress on megabit-to gigabit-level prototype chip demonstrations is summarized. Finally, the prospective applications of emerging NVM are discussed, ranging from the last-level cache to the storage-class memory in the memory hierarchy. Topics of three-dimensional (3D) integration and radiation-hard NVM are discussed. Novel applications beyond the conventional memory applications are also surveyed, including physical unclonable function for hardware security, reconfigurable routing switch for field-programmable gate array (FPGA), logic-in-memory and nonvolatile cache/register/flip-flop for nonvolatile processor, and synaptic device for neuro-inspired computing.
Overview
The claims and statistics of this paper haven’t been checked yet.
Run the check — free, no account needed. It reads the open-access text and checks the sources it cites.
Integrity signals
Registry
Cites
Statistics
Verification
Claims the paper makes
The claims and statistics of this paper haven’t been checked yet.
Run the check — free, no account needed. It reads the open-access text and checks the sources it cites.
Self-check
Percentages, sums and reported differences re-computed from the paper’s own numbers.
The self-check needs the paper’s full text.
Citations
Cites
Wong, H.-S. P., Lee, H.-Y., Yu, S., Chen, Y.-S., Wu, Y., Chen, P.-S., Lee, B., Chen, F. T., & Tsai, M.-J. (2012) · Proceedings of the IEEE · doi:10.1109/jproc.2012.2190369 · Cited by 2,757
Self-citationWong, H.-S. P., Raoux, S., Kim, S., Liang, J., Reifenberg, J. P., Rajendran, B., Asheghi, M., & Goodson, K. E. (2010) · Proceedings of the IEEE · doi:10.1109/jproc.2010.2070050 · Cited by 1,806
Synaptic electronics: materials, devices and applications
Kuzum, D., Yu, S., & Philip Wong, H.-S. (2013) · Nanotechnology · doi:10.1088/0957-4484/24/38/382001 · Cited by 1,258
Self-citationMemory leads the way to better computing
Wong, H.-S. P., & Salahuddin, S. (2015) · Nature Nanotechnology · doi:10.1038/nnano.2015.29 · Cited by 956
Enhancing lifetime and security of PCM-based main memory with start-gap wear leveling
Qureshi, M. K., Karidis, J., Franceschini, M., Srinivasan, V., Lastras, L., & Abali, B. (2009) · Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture · doi:10.1145/1669112.1669117 · Cited by 762
Bit Cost Scalable Technology with Punch and Plug Process for Ultra High Density Flash Memory
Tanaka, H., Kido, M., Yahashi, K., Oomura, M., Katsumata, R., Kito, M., Fukuzumi, Y., Sato, M., Nagata, Y., Matsuoka, Y., et al. (2007) · Symposium on VLSI Technology · doi:10.1109/vlsit.2007.4339708 · Cited by 609
Storage-class memory: The next storage system technology
Freitas, R. F., & Wilcke, W. W. (2008) · IBM Journal of Research and Development · doi:10.1147/rd.524.0439 · Cited by 510
Jang, J. H., Kim, H., Cho, W., Cho, H., Kim, J., Shim, S. I., Jang, Y., Jeong, J., Son, B., Kim, D. W., et al. (2006) · Symposium on VLSI Technology · Cited by 425
Access devices for 3D crosspoint memory
Burr, G. W., Shenoy, R. S., Virwani, K., Narayanan, P., Padilla, A., Kurdi, B., & Hwang, H. (2014) · Journal of Vacuum Science & Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena · doi:10.1116/1.4889999 · Cited by 371
Compact Modeling of RRAM Devices and Its Applications in 1T1R and 1S1R Array Design
Chen, P.-Y., & Yu, S. (2015) · IEEE Transactions on Electron Devices · doi:10.1109/ted.2015.2492421 · Cited by 364
Self-citation
Cited by
The future of electronics based on memristive systems
Zidan, M. A., Strachan, J. P., & Lu, W. D. (2018) · Nature Electronics · doi:10.1038/s41928-017-0006-8 · Cited by 2,138
Neuro-Inspired Computing With Emerging Nonvolatile Memorys
Yu, S. (2018) · Proceedings of the IEEE · doi:10.1109/jproc.2018.2790840 · Cited by 1,170
Self-citationReliability of analog resistive switching memory for neuromorphic computing
Zhao, M., Gao, B., Tang, J., Qian, H., & Wu, H. (2020) · Applied Physics Reviews · doi:10.1063/1.5124915 · Cited by 349
Artificial Neural Networks Based on Memristive Devices: From Device to System
Huang, H.-M., Wang, Z., Wang, T., Xiao, Y., & Guo, X. (2020) · Advanced Intelligent Systems · doi:10.1002/aisy.202000149 · Cited by 82
A Case for Emerging Memories in DNN Accelerators
Mukherjee, A., Saurav, K., Nair, P., Shekhar, S., & Lis, M. (2021) · 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE) · doi:10.23919/date51398.2021.9474252 · Cited by 12
Metadata
- Authors
- Yu, S., & Chen, P.-Y.
- Venue
- IEEE Solid-State Circuits Magazine
- Published
- 2016
- Volume
- 8
- Issue
- 2
- Pages
- 43-56
- ISSN
- 1943-0582 (ISSN-L)
- OpenAlex
- W2433248078
- Cited by
- 555
- References
- 59
- FWCI
- 20.58
- Type
- journal article
- Language
- en
- Open access
- closed
About these checks
Registry, retraction, Cites and statistics results are computed, not judged, with one exception: a printed reference that no index lists is read once by a model before it counts as a citation error. Claims are extracted by a model and kept only when their quote appears verbatim in the text; each cited source is then checked, with a model’s help, for whether it says what the claim relies on. Those verdicts can be wrong — read the claim’s quote and the cited source before relying on one.
Statistics and arithmetic are recomputed, not judged.
Confidence bands are shown only for fields calibrated on our annotated test set. None is calibrated yet, so no band is shown.
What counts as a claim ›How we measure confidence ›How we check this ›
Are you an author, or do you see a problem with this page? Request a review
How to cite
Cite CoChat for the checks on this page, and the paper for its own findings.
- This page
- CoChat. (2026). Citation check: Emerging Memory Technologies: Recent Trends and Prospects. https://app.cochat.ai/papers/10.1109/mssc.2016.2546199
- The paper
- Yu, S., & Chen, P.-Y. (2016). Emerging Memory Technologies: Recent Trends and Prospects. IEEE Solid-State Circuits Magazine. https://doi.org/10.1109/mssc.2016.2546199
Data sources
Bibliographic data: Semantic Scholar, OpenAlex, Crossref.
Contains information from the Semantic Scholar Academic Graph Datasets, made available under the ODC Attribution License (ODC-BY 1.0).
Semantic Scholar’s data is described in: Kinney, R., et al. (2023). The Semantic Scholar Open Data Platform. arXiv:2301.10140.