Cited by 11Physical Unclonable Functions (PUFs) and Hardware SecurityLow-power high-performance VLSI designRadiation Effects in Electronics

Novel Concept of the Transistor Variation Directed Toward the Circuit Implementation of Physical Unclonable Function (PUF) and True-random-number Generator (TRNG)

Xiao, Y., Hsieh, E. R., Chung, Steve S., Chen, T. R, Huang, S. A., Chen, T. J., Cheng, Osbert·2019·2019 IEEE International Electron Devices Meeting (IEDM)

Abstract

For the first time, we use a unique feature of S/D variation of FinFET to realize PUF (Physical unclonable function) and TRNG (True random number generator). With the scaling of transistors, S/D variation becomes significant. This provides an opportunity to use the mismatch of the S/D resistances for the design of PUF. Method has been developed to first rule out those less significant factors of variation. Then, a PUF is developed based on the dominant S/D variation. In terms of the security, this PUF exhibits ideal un-biased normal distribution of hamming distance, and narrow distribution of hamming weight in the range of 45%~55%. The unstable bit rates are also very low (1.17%) under room temperature and 3.12% under 150°C, benchmarked on a 256 bits array. Meanwhile, as a result of the defect (in the form of traps) at the drain/substrate junction, RTN behavior was observed from the current measured between drain/source and substrate, named Ib-RTN. It provides us a way to implement a TRNG This TRNG passed NIST test up to 9 items. Overall, the S/D mismatch PUF and Ib-RTN TRNG demonstrated great potential to meet the requirements of the IoT security application.

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Crossref · 10.1109/iedm19573.2019.8993496

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8 of 8 references verified0 citation errors · 0 not checkable

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  • A MOSFET-based tRNG with 100% CMOS compatibility has been demonstrated for high scalability and applicability to an advanced foundry platform by using random telegraph noise or random charge trapping effects as an entropy source.

    “As an alternative to the circuit-based tRNGs, a MOSFET-based tRNG with 100% CMOS compatibility has been demonstrated for high scalability and applicability to an advanced foundry platform by using random telegraph noise or random charge trapping effects as an entropy source (24–26).”
  • The MOSFET-based tRNG's randomness is not fully verified, and high power consumption remains a problem in some cases.

    “However, its randomness is not fully verified, and high power consumption remains a problem in some cases.”

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Authors
Xiao, Y., Hsieh, E. R., Chung, S. S., Chen, T. R., Huang, S. A., Chen, T. J., & Cheng, O.
Affiliations
  • National Yang Ming Chiao Tung University (TW)
  • United Microelectronics (Taiwan) (TW)
  • UMC,Hsinchu,Taiwan
Venue
2019 IEEE International Electron Devices Meeting (IEDM)
Publisher
IEEE
Published
2019-12
Pages
21.5.1-21.5.4
ISSN
0163-1918 (ISSN-L)
OpenAlex
W3006588925
Cited by
11
References
8
Citations by year
2026: 2 · 2024: 2 · 2023: 3 · 2022: 2 · 2020: 2
FWCI
0.79
Type
conference paper
Language
en
Open access
closed
Locations
Technical digest - International Electron Devices Meeting/Technical digest (publishedVersion)
Topics
  • Physical Sciences › Computer Science › Hardware and Architecture › Physical Unclonable Functions (PUFs) and Hardware Security
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › Low-power high-performance VLSI design
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › Radiation Effects in Electronics
Keywords
physical unclonable functions, true random number generator, FinFET, Hamming distance, Hamming weight, bias stability, Internet of Things security, NIST randomness tests

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