The DOI matches its Crossref record; 3 of the 3 references it cites were found in a registry or an index.
Reliability Characterization for Advanced DRAM using HK/MG + EUV Process Technology
Abstract
Extensive reliability characterization of advanced DRAM (with and without HK/MG) with EUV process technology is presented. The technology features buried-channel array transistor(BCAT), dual-poly gate core/periphery transistors, 4-metal layers with Cu/Al interconnects, embedded DRAM capacitor, and with 8, 12, 16Gb chips, enabling mobile LPDDRs, Graphic-DDR, HBM, and making up to 128-256GB DIMMs for server applications. FEOL and BEOL WLR reliability demonstrated showed well above 10 yrs, 125°C intrinsic performance and were also validated with long term months of stresses including 1000 hrs ofHTOL and> 6 months package level stresses. DIMMs were also tested with various workloads using server systems, for more than 1 yr, accurately validating the excellent reliability results that showed only few hundred ppms on 32-64GB DIMMs. Early fails can be further optimized by process defect control and test screens, such as burn-in. The DRAM memories are well in volume production.
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Cites
Reliability screening of high-k dielectrics based on voltage ramp stress
Kerber, A., Pantisano, L., Veloso, A., et al. (2007) · Microelectronics Reliability · doi:10.1016/j.microrel.2007.01.030 · Cited by 94
An Innovative Indicator to Evaluate DRAM Cell Transistor Leakage Current Distribution
Cho, M. H., Jeon, N., Kim, T. Y., Jeong, M., Lee, S., Hong, J. S., Hong, H. S., & Yamada, S. (2017) · IEEE Journal of the Electron Devices Society · doi:10.1109/jeds.2017.2758026 · Cited by 25
Self-citationThe Characterization of Degradation on various SiON pMOSFET transistors under AC/DC NBTI stress
Kim, G.-J., Yoon, M., Kim, S., et al. (2021) · IEEE International Reliability Physics Symposium proceedings · doi:10.1109/irps46558.2021.9405108 · Cited by 4
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Extreme ultraviolet lithography
Kazazis, D., Santaclara, J. G., van Schoot, J., Mochi, I., & Ekinci, Y. (2024) · Nature Reviews Methods Primers · doi:10.1038/s43586-024-00361-z · Cited by 149
Metadata
- Authors
- Lee, S., Kim, G.-J., Lee, N.-H., Lee, K., Woo, B., Jin, J., Kim, J., Lee, Y., Kim, H., & Pae, S.
- Affiliations
- Samsung (South Korea) (KR)
- Memory Division, Samsung Electronics,Hwasung,Republic of Korea
- ORCID
- Jin, J.
- Venue
- 2021 IEEE International Electron Devices Meeting (IEDM)
- Publisher
- IEEE
- Published
- 2021-12-11
- Pages
- 6.6.1-6.6.4
- ISSN
- 0163-1918 (ISSN-L)
- OpenAlex
- W4226094037
- Cited by
- 22
- References
- 3
- Citations by year
- 2025: 5 · 2024: 9 · 2023: 6 · 2022: 2
- FWCI
- 6.67
- Type
- conference paper
- Language
- en
- Open access
- closed
- Locations
- Technical digest - International Electron Devices Meeting/Technical digest (publishedVersion)
- Topics
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Semiconductor materials and devices
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Integrated Circuits and Semiconductor Failure Analysis
- Physical Sciences › Materials Science › Electronic, Optical and Magnetic Materials › Copper Interconnects and Reliability
- Keywords
- DRAM reliability, EUV lithography, high temperature operating life, burn-in, long-term reliability, HBM
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- The paper
- Lee, S., Kim, G.-J., Lee, N.-H., Lee, K., Woo, B., Jin, J., Kim, J., Lee, Y., Kim, H., & Pae, S. (2021). Reliability Characterization for Advanced DRAM using HK/MG + EUV Process Technology. 2021 IEEE International Electron Devices Meeting (IEDM). https://doi.org/10.1109/iedm19574.2021.9720613
