An auto-tuning framework for parallel multicore stencil computations
Open accessAbstract
Although stencil auto-tuning has shown tremendous potential in effectively utilizing architectural resources, it has hitherto been limited to single kernel instantiations; in addition, the large variety of stencil kernels used in practice makes this computation pattern difficult to assemble into a library. This work presents a stencil auto-tuning framework that significantly advances programmer productivity by automatically converting a straightforward sequential Fortran 95 stencil expression into tuned parallel implementations in Fortran, C, or CUDA, thus allowing performance portability across diverse computer architectures, including the AMD Barcelona, Intel Nehalem, Sun Victoria Falls, and the latest NVIDIA GPUs. Results show that our generalized methodology delivers significant performance gains of up to 22× speedup over the reference serial implementation. Overall we demonstrate that such domain-specific auto-tuners hold enormous promise for architectural efficiency, programmer productivity, performance portability, and algorithmic adaptability on existing and emerging multicore systems.
Integrity signals
Registry
Cites
Statistics
Claims the paper makes
2 of 7 cited sources checked · 1 supported · 0 flagged · accuracy not yet measured
- Premisereasoning
Building a static auto-tuning library in the spirit of ATLAS or OSKI to implement the many different stencil kernels is infeasible.
“Thus, building a static auto-tuning library in the spirit of ATLAS [25] or OSKI [24] to implement the many different stencil kernels is infeasible.”
Quote in the paperSubstantial claim1 of 2 sources checked- cites [25] 25. R. C. Whaley, A. Petitet, and J. Dongarra. Automated Empirical Optimization of Software and the ATLAS project. Parallel Computing, 27(1-2):3-35, 2001. source
- cites [24] 24. R. Vuduc, J. Demmel, and K. Yelick. OSKI: A library of automatically tuned sparse matrix kernels. In Proc. of SciDAC 2005, J. of Physics: Conference Series, June 2005. source
- Findingown data
The framework's auto-parallelization slightly improves Barcelona's performance compared to the OpenMP version.
“Furthermore, our approach slightly improves Barcelona's performance, while Nehalem and Victoria Falls see up to a 17% and 25% speedup (respectively) compared to the OpenMP version”
Quote in the paperNot a substantial claim - Findingown data
The framework's NUMA-aware auto-parallelization performance is well correlated with the OpenMP parallelized version.
“Results, shown as yellow diamonds in Figure 4, show that performance is well correlated with our framework's NUMA-aware autoparallelization.”
Quote in the paperSubstantial claim - Findingown data
Nehalem sees up to a 17% speedup compared to the OpenMP version.
“Furthermore, our approach slightly improves Barcelona's performance, while Nehalem and Victoria Falls see up to a 17% and 25% speedup (respectively) compared to the OpenMP version”
Quote in the paperSubstantial claim - Findingown data
The generalized methodology delivers performance gains of up to 22× speedup over the reference serial implementation.
“Results show that our generalized methodology delivers significant performance gains of up to 22× speedup over the reference serial implementation.”
- Also stated in: § I. Introduction · plain
“Results show that our generalized methodology can deliver significant performance gains of up to 22× speedup compared with the reference serial version, while allowing portability across diverse CMP technologies.”
Quote in the paperSubstantial claim - Also stated in: § I. Introduction · plain
- Findingown data
The fully tuned performance closely matches the model's expectations.
“Overall, our fully tuned performance closely matches our model's expectations”
Quote in the paperSubstantial claim- The authors state this as an assumption: All kernels are memory bound and do not suffer from an abundance of capacity misses.
- Findingown data
Barcelona and Nehalem see between 1.7× to 4× improvement for both the one and two socket cases over the conventional parallelized case.
“Overall, Barcelona and Nehalem see between 1.7× to 4× improvement for both the one and two socket cases over the conventional parallelized case”
Quote in the paperSubstantial claim - Findingnone given
The auto-tuner achieves results extremely close to the architectural peak performance of the system, which is limited ultimately by memory bandwidth.
“The auto-tuner is able to achieve results that are extremely close to the architectural peak performance of the system, which is limited ultimately by memory bandwidth.”
Quote in the paperSubstantial claim- The authors state this as an assumption: All kernels are memory bound and do not suffer from an abundance of capacity misses.
- Findingreasoning
The Nehalem obtains the best overall performance of the cache-based systems.
“The Nehalem obtains the best overall performance of the cache-based systems”
Quote in the paperNot a substantial claim - Findingnone given
For Barcelona and Nehalem, the optimized kernels obtain performance essentially equivalent to peak memory bandwidth.
“For Barcelona and Nehalem, our optimized kernels obtain performance essentially equivalent to peak memory bandwidth.”
Quote in the paperSubstantial claim- The authors state this as an assumption: All kernels are memory bound and do not suffer from an abundance of capacity misses.
- Findingnone given
The framework demonstrates up to 22× speedup compared with the default serial version.
“demonstrating up to 22× speedup compared with the default serial version.”
Quote in the paperSubstantial claim - Findingreasoning
For Victoria Falls, the obtained bandwidth is around 20% less than peak for each of the kernels.
“For Victoria Falls, the obtained bandwidth is around 20% less than peak for each of the kernels”
Quote in the paperSubstantial claim- The authors state this as an assumption: All kernels are memory bound and do not suffer from an abundance of capacity misses.
- Findingreasoning
The GTX280 consistently attains the highest performance.
“The GTX280 consistently attains the highest performance”
Quote in the paperNot a substantial claim - Findingown data
The framework obtains near identical results on Barcelona compared to the handwritten version.
“We obtain near identical results on the Barcelona”
Quote in the paperSubstantial claim - Findingown data
Auto-tuning on Victoria Falls gives a full 22× improvement over an unparallelized example.
“but a full 22× improvement over an unparallelized example.”
Quote in the paperNot a substantial claim - Findingcitation
The GTX280 results were below the performance model bound.
“Finally, the GTX280 results were also below our performance model bound”
Quote in the paperNot a substantial claim- The authors state this as an assumption: All kernels are memory bound and do not suffer from an abundance of capacity misses.
- Findingnone given
Utilizing the framework across a broad range of possible stencils requires only a few minutes to annotate a given kernel region and pass it through the auto-parallelization and auto-tuning infrastructure.
“utilizing our framework across a broad range of possible stencils only requires a few minutes to annotate a given kernel region, and pass it through our auto-parallelization and auto-tuning infrastructure”
Quote in the paperSubstantial claim - Findingown data
The GTX280 shows impressive gains over the cache-based architecture if considered as a standalone device.
“The GTX280 shows impressive gains over the cache-based architecture if considered as a standalone device”
Quote in the paperNot a substantial claim - Findingown data
Auto-tuning on the GTX280 boosted performance by 1.5× to 2× across the full range of kernels over the baseline CUDA code.
“Finally, auto-tuning on the GTX280 boosted performance by 1.5× to 2× across the full range of kernels -a substantial improvement over the baseline CUDA code”
Quote in the paperSubstantial claim - Findingown data
Barcelona and Nehalem see up to 10 times improvement over the serial code.
“and up to 10 times improvement over the serial code.”
Quote in the paperSubstantial claim - Findingreasoning
Victoria Falls obtains high performance, especially given its low clock speed.
“Additionally, Victoria Falls obtains high performance, especially given its low clock speed”
Quote in the paperNot a substantial claim - Findingown data
The framework obtains higher results on the Victoria Falls platform (6 GFlop/s versus 5.3 GFlop/s) compared to the handwritten version.
“and even higher results on the Victoria Falls platform (6 GFlop/s versus 5.3 GFlop/s).”
Quote in the paperNot a substantial claim - Findingown data
Victoria Falls sees up to a 25% speedup compared to the OpenMP version.
“Furthermore, our approach slightly improves Barcelona's performance, while Nehalem and Victoria Falls see up to a 17% and 25% speedup (respectively) compared to the OpenMP version”
Quote in the paperSubstantial claim - Findingown data
Comparing results over the same set of optimizations, the framework attains excellent performance that is comparable to the handwritten version.
“However, comparing results over the same set of optimizations, we find that our framework attains excellent performance that is comparable to the handwritten version.”
Quote in the paperSubstantial claim - Interpretationreasoning
A domain-specific code generator run by the user has the freedom to implement transformations that a compiler may not.
“Thus, a domain-specific code generator run by the user has the freedom to implement transformations that a compiler may not.”
Quote in the paperSubstantial claim - Interpretationnone given
The framework uses a domain-specific transformation and code-generation framework combined with a fully-automated search to replace stencil kernels with their optimized versions.
“This work presents a proof-of-concept of a generalized auto-tuning approach, which uses a domainspecific transformation and code-generation framework combined with a fully-automated search to replace stencil kernels with their optimized versions.”
Quote in the paperSubstantial claim - Interpretationnone given
The auto-tuning system can target and accelerate a large group of stencil kernels currently in use.
“Overall, our auto-tuning system can target and accelerate a large group of stencil kernels currently in use, while active research continues to extend the generality of the framework.”
Quote in the paperSubstantial claim - Interpretationreasoning
The combined parameter space of the serial and parallel optimizations is so large that trying all possible strategies is infeasible.
“Because the combined parameter space of the preceding optimizations is so large, it is clearly infeasible to try all possible strategies.”
Quote in the paperSubstantial claim - Interpretationown data
The Victoria Falls bandwidth shortfall is because the framework does not currently implement software prefetching and array padding, which are critical for performance on that architecture.
“because our framework does not currently implement software prefetching and array padding, which are critical for performance on this architecture.”
Quote in the paperSubstantial claim- The authors state this as an assumption: All kernels are memory bound and do not suffer from an abundance of capacity misses.
- Interpretationreasoning
Victoria Falls' high performance is due to massive parallelism combined with an aggregate memory bandwidth of 64 GB/s.
“thanks to massive parallelism combined with an aggregate memory bandwidth of 64 GB/s.”
Quote in the paperNot a substantial claim - Study design and conductcitation
The framework does not currently implement several hand-tuned optimizations, including SIMDization, padding, or the employment of cache bypass (movntpd).
“Currently our framework does not implement several hand-tuned optimizations [3], including SIMDization, padding, or the employment of cache bypass (movntpd).”
Quote in the paperNot a substantial claim0 of 1 sources checked- cites [3] 3. K. Datta, M. Murphy, V. Volkov, et al. Stencil Computation Optimization and Auto-Tuning on State-of-the-art Multicore Architectures. In Proceedings of SC '08, Austin, Texas, 2008. source
- Interpretationcitation
The GTX280 below-bound results are likely due to no array padding.
“likely due to no array padding [3].”
Quote in the paperNot a substantial claim0 of 1 sources checked- cites [3] 3. K. Datta, M. Murphy, V. Volkov, et al. Stencil Computation Optimization and Auto-Tuning on State-of-the-art Multicore Architectures. In Proceedings of SC '08, Austin, Texas, 2008. source
- The authors state this as an assumption: All kernels are memory bound and do not suffer from an abundance of capacity misses.
- Interpretationreasoning
The Nehalem's best performance is due to the combination of high memory bandwidth per socket and hardware multithreading to fully utilize the available bandwidth.
“due to the combination of high memory bandwidth per socket and hardware multithreading to fully utilize the available bandwidth.”
Quote in the paperNot a substantial claim - Interpretationown data
Auto-tuning is essential on Victoria Falls.
“The results also show that auto-tuning is essential on Victoria Falls”
Quote in the paperSubstantial claim - Interpretationown data
The framework demonstrates performance portability across the sample kernels.
“This clearly demonstrates the performance portability of this framework across the sample kernels.”
Quote in the paperSubstantial claim - Interpretationown data
The auto-parallelization methodology is effective even before auto-tuning.
“indicating the effectiveness of our auto-parallelization methodology even before auto-tuning.”
Quote in the paperSubstantial claim
- May combine two claims. 15
- The quote only partly states this claim. 2
- Classified as probably not a substantial claim. 8
May combine two claims.
PremisecitationCache blocking in the unit-stride dimension could be practical on the Victoria Falls architecture, while on Barcelona or Nehalem the presence of hardware prefetchers makes such a transformation non-beneficial.
“For example, cache blocking in the unit stride dimension could be practical on the Victoria Falls architecture, while on Barcelona or Nehalem, the presence of hardware prefetchers makes such a transformation non-beneficial [5].”
Quote in the paperNot a substantial claim1 of 1 sources checked- cites [5] 5. Kaushik Datta, Shoaib Kamil, Samuel Williams, Leonid Oliker, John Shalf, and Katherine Yelick. Optimization and perfor- mance modeling of stencil computations on modern micropro- cessors. SIAM Review, 51(1):129-159, 2009. source
Section 4.1 says hardware prefetching can interfere with cache blocking, and section 7.1 reports better performance when the unit-stride dimension was left uncut. The paper does not establish the claimed contrast between Victoria Falls and Barcelona or Nehalem; section 2.3 identifies its studied processors as Itanium2, Opteron, Power5, and Cell. No page numbers are available in our copy. (LLM, conf=0.88)
Experimental — accuracy not yet measured
May combine two claims.
FindingreasoningThe three examined kernels (3D Laplacian, Divergence, Gradient) have low arithmetic intensity and are expected to be memory-bandwidth bound.
“As described below, these kernels have such low arithmetic intensity that they are expected to be memory-bandwidth bound, and thus deliver performance approximately equal to the product of their arithmetic intensity -defined as the ratio of arithmetic operations to memory traffic -and the system stream bandwidth.”
Quote in the paperSubstantial claimMay combine two claims.
Findingown dataThe framework's transformations yield code that outperforms compiler-only optimized versions, showing that compiler algorithms cannot always prove that these safe optimizations are allowed.
“Additionally, the fact that our framework's transformations yield code that outperforms compileronly optimized versions shows compiler algorithms cannot always prove that these (safe) optimizations are allowed.”
Quote in the paperSubstantial claimMay combine two claims. The quote only partly states this claim.
Findingown dataThe naive arithmetic intensities of the three examined kernels range from 0.20 to 0.08, and their tuned arithmetic intensities range from 0.33 to 0.11.
“A naïve implementation will produce memory traffic equal to the sum of these components, and will therefore result in the shown arithmetic intensity ( totalf lops totalbytes ), ranging from 0.20-0.08.”
- Also stated in: § A. Benchmark Kernels · plain
“Moreover, note that the kernel's auto-tuned arithmetic intensity will vary substantially from each other, ranging from 0.33-0.11.”
Quote in the paperSubstantial claim- Also stated in: § A. Benchmark Kernels · plain
May combine two claims.
FindingreasoningAuto-tuning is expected to provide performance boosts of 1.66×, 1.40×, and 1.28× for the Laplacian, Divergence, and Gradient kernels respectively.
“Thus, we can also bound the resultant potential performance boost from auto-tuning per kernel -1.66×, 1.40×, and 1.28× for the Laplacian, Divergence, and Gradient respectively.”
Quote in the paperSubstantial claim- The authors state this as an assumption: Auto-tuning benefit is estimated assuming a memory-bound kernel without conflict misses.
May combine two claims.
Findingnone givenThe framework requires only a few minutes of human effort to instrument each stencil code, and the resulting code achieves performance comparable to previous hand-optimized code that required several months of work.
“Furthermore, while our framework only requires a few minutes of human effort to instrument each stencil code, the resulting code achieves performance comparable to previous hand-optimized code that required several months of tedious work to produce.”
Quote in the paperSubstantial claimMay combine two claims.
Findingown dataOn the GTX280, previous hand-tuned Laplacian results attained 36 GFlop/s compared with the framework's 13 GFlop/s.
“A significant disparity is seen on the GTX280, where previous handtuned Laplacian results attained 36 GFlop/s, compared with our framework's 13 GFlop/s.”
Quote in the paperSubstantial claimMay combine two claims.
Findingown dataIf system power is included, the GTX280's advantage is diminished and the Nehalem becomes the most power efficient architecture evaluated in this study.
“but if system power is included, the GTX280's advantage is diminished and the Nehalem becomes the most power efficient architecture evaluated in this study.”
Quote in the paperNot a substantial claimMay combine two claims.
Findingown dataAuto-tuning on Victoria Falls increases performance by 2.5× and 1.4× on 64 and 128 threads respectively compared to the conventional parallelized case.
“enabling much better scalability and increasing performance by 2.5× and 1.4× on 64 and 128 threads respectively in comparison to the conventional parallelized case”
Quote in the paperSubstantial claimProbably not a substantial claim: may not pass S2 (checkable), S3 (load-bearing), S4 (based).
Interpretationnone givenThe evaluated node architectures, although diverse, most accurately represent building-blocks of current and future ultrascale supercomputing systems.
“Although the node architectures are diverse, most accurately represent building-blocks of current and future ultrascale supercomputing systems.”
Quote in the paperNot a substantial claimClassified as probably not a substantial claim.
Interpretationnone givenThe restricted domain allows the framework to make certain assumptions about aliasing and dependencies.
“Our restricted domain allows us to make certain assumptions about aliasing and dependencies.”
Quote in the paperSubstantial claimProbably not a substantial claim: may not pass S3 (load-bearing).
Study design and conductcitationThe impact of host transfer overhead is not considered in this evaluation.
“We do not consider the impact of host transfer overhead; previous work [3] examined this potentially significant bottleneck in detail.”
Quote in the paperNot a substantial claim0 of 1 sources checked- cites [3] 3. K. Datta, M. Murphy, V. Volkov, et al. Stencil Computation Optimization and Auto-Tuning on State-of-the-art Multicore Architectures. In Proceedings of SC '08, Austin, Texas, 2008. source
May combine two claims.
InterpretationreasoningThe framework side-steps the complex task of analysis and presents a simple, uniform, and familiar interface for expressing stencil kernels as a conventional Fortran expression.
“The framework side-steps the complex task of analysis and presents a simple, uniform, and familiar interface for expressing stencil kernels as a conventional Fortran expressionwhile presenting a proof-of-concept for other potential classes of domain-specific generalized auto-tuners.”
Quote in the paperSubstantial claimMay combine two claims. The quote only partly states this claim.
Interpretationnone givenThe framework takes a straightforward sequential Fortran 95 stencil expression as input and automatically generates tuned parallel implementations in Fortran, C, or CUDA, providing performance portability across diverse architectures including AMD Barcelona, Intel Nehalem, Sun Victoria Falls, and NVIDIA GPUs.
“Our framework takes as input a straightforward sequential Fortran 95 stencil expression and automatically generates tuned parallel implementations in Fortran, C, or CUDA, thus providing performance portability across diverse architectures that range from conventional multicore processors to some of the latest graphics processing units (GPUs).”
Quote in the paperSubstantial claimMay combine two claims.
InterpretationreasoningAll evaluated architectures have Flop:DRAM byte ratios significantly greater than the arithmetic intensities of the kernels, so all architectures are expected to be memory bound.
“As all architectures have Flop:DRAM byte ratios significantly greater than the arithmetic intensities described in Section III-A, we expect all architectures to be memory bound.”
Quote in the paperSubstantial claimClassified as probably not a substantial claim.
InterpretationreasoningBecause optimizations are expressed as transformations on the AST, it is possible to combine them in ways that would otherwise be difficult using simple string substitution.
“Because optimizations are expressed as transformations on the AST, it is possible to combine them in ways that would otherwise be difficult using simple string substitution.”
Quote in the paperSubstantial claimProbably not a substantial claim: may not pass S4 (based). May combine two claims.
Interpretationnone givenThe framework has the applicability of a general domain-specific compiler like SPIRAL, while supporting multiple backend architectures.
“In particular, the framework has the applicability of a general domain-specific compiler like SPIRAL, while supporting multiple backend architectures.”
Quote in the paperNot a substantial claimProbably not a substantial claim: may not pass S3 (load-bearing).
Interpretationnone givenThe auto-tuning system currently handles a specific class of stencil kernels of certain dimensionality and code structure.
“Currently, the auto-tuning system handles a specific class of stencil kernels of certain dimensionality and code structure.”
Quote in the paperNot a substantial claim- The authors state this as an assumption: The auto-tuning system assumes a 2D or 3D rectahedral grid, and a stencil based on arithmetic operations and table lookups.
Probably not a substantial claim: may not pass S3 (load-bearing).
Interpretationnone givenThe modular architecture of the framework enables it to be extended through the development of additional parser, strategy engine, and code generator modules.
“The modular architecture of our framework enables it to be extended through the development of additional parser, strategy engine, and code generator modules.”
Quote in the paperNot a substantial claimMay combine two claims.
Interpretationown dataFor the CUDA implementations, the automated version only utilizes optimizations and code structures applicable to general stencils, while the hand-tuned version explicitly discovered and exploited the temporal locality specific to the Laplacian kernel, thus maximizing performance but limiting the method's applicability.
“For the CUDA implementations, our automated version only utilizes optimizations and code structures applicable to general stencils, while the hand-tuned version explicitly discovered and exploited the temporal locality specific to the Laplacian kernel -thus maximizing performance, but limiting the method's applicability.”
Quote in the paperSubstantial claimProbably not a substantial claim: may not pass S3 (load-bearing).
InterpretationreasoningThe GTX280's highest performance is due to its massive parallelism at high clock rates.
“due to its massive parallelism at high clock rates”
Quote in the paperNot a substantial claimMay combine two claims.
Study design and conductcitationTransfer times from system DRAM to board memory through the PCI Express bus are not included and could significantly impact performance.
“but transfer times from system DRAM to board memory through the PCI Express bus are not included and could significantly impact performance [3].”
Quote in the paperNot a substantial claim0 of 1 sources checked- cites [3] 3. K. Datta, M. Murphy, V. Volkov, et al. Stencil Computation Optimization and Auto-Tuning on State-of-the-art Multicore Architectures. In Proceedings of SC '08, Austin, Texas, 2008. source
The authors state this as an assumption.
The auto-tuning system assumes a 2D or 3D rectahedral grid, and a stencil based on arithmetic operations and table lookups.
“In particular, the auto-tuning system assumes a 2D or 3D rectahedral grid, and a stencil based on arithmetic operations and table lookups (array accesses).”
The authors state this as an assumption.
Auto-tuning benefit is estimated assuming a memory-bound kernel without conflict misses.
“Auto-tuning benefit is a reasonable estimate based on the improvement in arithmetic intensity assuming a memory bound kernel without conflict misses.”
The authors state this as an assumption.
Capacity misses represent a reasonable estimate for cache-based superscalar processors.
“Capacity misses represent a reasonable estimate for cache-based superscalar processors.”
The paper relies on this without support.
The test harness with random data populating the grids measures performance representative of real applications.
“the test harness simply calls the kernel with random data populating the grids and measures performance.”
The authors state this as an assumption.
All kernels are memory bound and do not suffer from an abundance of capacity misses.
“Assuming all kernels are memory bound and do not suffer from an abundance of capacity misses”
Self-check
Percentages, sums and reported differences re-computed from the paper’s own numbers.
Each contradiction between two passages listed here was confirmed by an independent check.
Current dimensionality limit conflicts with an arbitrary-dimensionality claim
MinorThe paper says the implemented serial optimizations handle stencil kernels of arbitrary dimensionality, but elsewhere says the current auto-tuning system accepts only 2D or 3D grids and treats arbitrary dimensionality as future work.
“These optimizations are implemented to take advantage of the specific domain of interest: Jacobi-like stencil kernels of arbitrary dimensionality.”
“In particular, the auto-tuning system assumes a 2D or 3D rectahedral grid, and a stencil based on arithmetic operations and table lookups (array accesses).Future work will further extend the generality to allow grids of arbitrary dimensionality.”
Cites
Williams, S., Waterman, A., & Patterson, D. A. (2009) · Communications of the ACM · doi:10.1145/1498765.1498785 · Cited by 2,484 · see citing works
Self-citation(2006) · Cited by 1,979 · see citing works
Self-citationAutomated empirical optimizations of software and the ATLAS project
Clint Whaley, R., Petitet, A., & Dongarra, J. J. (2001) · Parallel Computing · doi:10.1016/s0167-8191(00)00087-9 · Cited by 1,317 · see citing works
A practical automatic polyhedral parallelizer and locality optimizer
Bondhugula, U. K. R., Hartono, A., Ramanujam, J., & Sadayappan, P. (2008) · ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI) · doi:10.1145/1375581.1375595 · Cited by 881 · see citing works
SPIRAL: Code Generation for DSP Transforms
Puschel, M., Moura, J. M. F., Johnson, J. R., Padua, D., Veloso, M. M., Singer, B. W., Xiong, J., Franchetti, F., Gacic, A., Voronenko, Y., et al. (2005) · Proceedings of the IEEE · doi:10.1109/jproc.2004.840306 · Cited by 826 · see citing works
Evaluating associativity in CPU caches
Hill, M. D., & Smith, A. J. (1989) · IEEE Transactions on Computers · doi:10.1109/12.40842 · Cited by 606 · see citing works
OSKI: A library of automatically tuned sparse matrix kernels
Vuduc, R., Demmel, J. W., & Yelick, K. A. (2005) · Journal of Physics: Conference Series · doi:10.1088/1742-6596/16/1/071 · Cited by 490 · see citing works
Stencil computation optimization and auto-tuning on state-of-the-art multicore architectures
Datta, K., Murphy, M., Volkov, V. M., Williams, S., Carter, J. T., Oliker, L., Patterson, D. A., Shalf, J. M., & Yelick, K. (2008) · IEEE International Conference on High Performance Computing, Data, and Analytics · doi:10.5555/1413370.1413375 · Cited by 463 · see citing works
Self-citationCode generation in the polyhedral model is easier than you think
Bastoul, C. (2004) · Proceedings. 13th International Conference on Parallel Architecture and Compilation Techniques, 2004. PACT 2004. · doi:10.1109/pact.2004.1342537 · Cited by 447 · see citing works
A fast Fourier transform compiler
Frigo, M. (1999) · ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI) · doi:10.1145/301618.301661 · Cited by 445 · see citing works
Stencil computation optimization and auto-tuning on state-of-the-art multicore architectures
Datta, K., Murphy, M., Volkov, V. M., Williams, S., Carter, J. T., Oliker, L., Patterson, D. A., Shalf, J. M., & Yelick, K. (2008) · International Conference for High Performance Computing, Networking, Storage and Analysis (SC) · doi:10.1109/sc.2008.5222004 · Cited by 280 · see citing works
Self-citationA practical automatic polyhedral parallelizer and locality optimizer
Bondhugula, U., Hartono, A., Ramanujam, J., & Sadayappan, P. (2008) · ACM SIGPLAN Notices · doi:10.1145/1379022.1375595 · Cited by 248 · see citing works
Optimization and Performance Modeling of Stencil Computations on Modern Microprocessors
Datta, K., Kamil, S., Williams, S., Oliker, L., Shalf, J., & Yelick, K. (2009) · SIAM Review · doi:10.1137/070693199 · Cited by 217 · see citing works
Self-citationTiling Optimizations for 3D Scientific Computations
Rivera, G., & Tseng, C. (2000) · Cited by 173 · see citing works
Blocking and array contraction across arbitrarily nested loops using affine partitioning
Lim, A. W., Liao, S.-W., & Lam, M. S. (2001) · ACM SIGPLAN Symposium on Principles & Practice of Parallel Programming · doi:10.1145/568014.379586 · Cited by 166
Solar-Lezama, A., Arnold, G., Tancau, L., Bodik, R., Saraswat, V., & Seshia, S. (2007) · Proceedings of the 28th ACM SIGPLAN Conference on Programming Language Design and Implementation · doi:10.1145/1250734.1250754 · Cited by 149 · see citing works
Blocking and array contraction across arbitrarily nested loops using affine partitioning
Lim, A. W., Liao, S.-W., & Lam, M. S. (2001) · Proceedings of the eighth ACM SIGPLAN symposium on Principles and practices of parallel programming · doi:10.1145/379539.379586 · Cited by 142 · see citing works
Implicit and explicit optimizations for stencil computations
Kamil, S., Datta, K., Williams, S., Oliker, L., Shalf, J., & Yelick, K. (2006) · Proceedings of the 2006 workshop on Memory system performance and correctness · doi:10.1145/1178597.1178605 · Cited by 130 · see citing works
Self-citationTiling Optimizations for 3D Scientific Computations
Rivera, G., & Tseng, C.-W. (2000) · ACM/IEEE SC 2000 Conference (SC'00) · doi:10.1109/sc.2000.10015 · Cited by 127 · see citing works
Williams, S., Waterman, A., & Patterson, D. (2009) · doi:10.2172/1407078 · Cited by 110 · see citing works
Self-citationA fast Fourier transform compiler
Frigo, M. (1999) · ACM SIGPLAN Notices · doi:10.1145/301631.301661 · Cited by 100 · see citing works
(2009) · Cited by 77 · see citing works
Auto-tuning stencil codes for cache-based multicore platforms
Yelick, K., & Datta, K. (2009) · Cited by 66 · see citing works
Cache-Efficient Multigrid Algorithms
Sellappa, S., & Chatterjee, S. (2004) · The International Journal of High Performance Computing Applications · doi:10.1177/1094342004041295 · Cited by 49 · see citing works
(2009) · University of North Texas Digital Library (University of North Texas) · Cited by 32 · see citing works
Self-citationSolar-Lezama, A., Arnold, G., Tancau, L., Bodík, R., Saraswat, V., & Seshia, S. A. (2007) · ACM SIGPLAN Notices · doi:10.1145/1273442.1250754 · Cited by 23 · see citing works
Attardi, G. M. (1994) · ACM SIGPLAN Lisp Pointers · doi:10.1145/1040031.224142 · Cited by 7 · see citing works
Datta, A. K., Murphy, M., Volkov, Williams, S., Carter, J. T., Oliker, L., Patterson, D., Shalf, J. M., & Yelick, K. (2008) · doi:10.1145/1413370.1413375 · Cited by 7 · see citing works
Self-citationParAgent: A Domain-Specific Semi-automatic Parallelization Tool
Mitra, S., Kothari, S. C., Cho, J., et al. (2000) · Lecture notes in computer science · doi:10.1007/3-540-44467-x_13 · Cited by 6 · see citing works
Flagged first, then by citations
1 of the 31 references couldn’t be matched to a known paper.
Research works printed but not linked: 5
- 0, GreenFlash
- 0, Lapack— Linear Algebra Package
- 0, LLVM Homepage
- 0, Embeddable Common Lisp
- 0, OpenMP API Specification for Parallel Programming
Cited by
Sorted by citations
(2013) · doi:10.1145/2491956.2462176 · Cited by 885 · see citing works
“Autotuning has also been applied to iterated stencil computations, but past tuning work has focussed on exhaustive search of small parameter spaces for one or a few strategies [15].”
MethodAnsel, J., Kamil, S. A., Veeramachaneni, K. K., Ragan‐Kelley, J., Bosboom, J., O’Reilly, U.-M., & Amarasinghe, S. P. (2014) · International Conference on Parallel Architectures and Compilation Techniques (PACT) · doi:10.1145/2628071.2628092 · Cited by 531 · see citing works
“In [20], the authors describe a generalized system for autotuning memory-bound stencil computations on modern multicore machines and GPUs.”
BackgroundSelf-citationRagan‐Kelley, J., Barnes, C., Adams, A., Paris, S., Durand, F., & Amarasinghe, S. P. (2013) · ACM SIGPLAN Notices · doi:10.1145/2499370.2462176 · Cited by 514 · see citing works
Tang, Y., Chowdhury, R., Kuszmaul, B. C., Luk, C.-K., & Leiserson, C. E. (2011) · ACM Symposium on Parallelism in Algorithms and Architectures (SPAA) · doi:10.1145/1989493.1989508 · Cited by 338 · see citing works
“[25] have explored automatic parallelization and tuning of”
BackgroundChristen, M., Schenk, O., & Burkhart, H. (2011) · Proceedings - IEEE International Parallel and Distributed Processing Symposium · doi:10.1109/ipdps.2011.70 · Cited by 314 · see citing works
“This is one of the key features in which PATUS differs from other code generation and autotuning frameworks for stencil codes, such as the one proposed by Kamil [1].”
BackgroundUnat, D., Cai, X. H., & Baden, S. B. (2011) · International Conference on Supercomputing · doi:10.1145/1995896.1995932 · Cited by 149 · see citing works
“[20].”
Cache-aware Roofline model: Upgrading the loft
Ilić, A., Pratas, F., & Sousa, L. A. (2013) · IEEE Computer Architecture Letters · doi:10.1109/l-ca.2013.6 · Cited by 132 · see citing works
“Its usefulness is patent in several works [9], both at the application [4], [6], [8] and at the architectural level [5], [7].”
BackgroundAuto-generation and auto-tuning of 3D stencil codes on GPU clusters
Zhang, Y., & Mueller, F. (2012) · Proceedings of the CGO/Proceedings of the ... CGO · doi:10.1145/2259016.2259037 · Cited by 119 · see citing works
“Previous implementations of stencil computations on GPUs can be grouped into three categories: (1) Hand-coded implementations of a particular stencil that strive to achieve the best performance possible [17, 18, 20] — but with optimization techniques that may not generalize to other types of stencils — (2) Implementat…”
BackgroundResistive Associative Processor
Yavits, L., Kvatinsky, S., Morad, A., et al. (2014) · IEEE Computer Architecture Letters · doi:10.1109/lca.2014.2374597 · Cited by 99 · see citing works
“In general, applications with low arithmetic intensity (the ratio of arithmetic operations to memory access [14]), such as sparse linear algebra kernels, are”
BackgroundHigh performance stencil code generation with Lift
Hagedorn, B., Stoltzfus, L., Steuwer, M., et al. (2018) · International Symposium on Code Generation and Optimization (CGO) · doi:10.1145/3168824 · Cited by 87 · see citing works
The effect of communication and synchronization on Amdahl’s law in multicore systems
Yavits, L., Morad, A., & Ginosar, R. (2013) · Parallel Computing · doi:10.1016/j.parco.2013.11.001 · Cited by 74 · see citing works
“Third, for low arithmetic intensity [22] tasks, parallel execution may result in lower speedup, or even no speedup relative to Amdahl’s law [1].”
BackgroundMachine learning for predictive auto-tuning with boosted regression trees
Bergstra, J., Pinto, N., & Cox, D. (2012) · Innovative Parallel Computing (InPar) · doi:10.1109/inpar.2012.6339587 · Cited by 70 · see citing works
“…of high-performance domain-specific libraries including dense linear algebra [Clint Whaley et al., 2001, Bilmes et al., 1997], sparse linear algebra [Vuduc et al., 2005], signal processing [Frigo and Johnson, 2005], sorting [Li et al., 2004], general stencil operations [Kamil et al., 2010], etc.”
BackgroundPyOP2: A High-Level Framework for Performance-Portable Simulations on Unstructured Meshes
Rathgeber, F., Markall, G. R., Mitchell, L., et al. (2012) · doi:10.1109/sc.companion.2012.134 · Cited by 68 · see citing works
“Performance portability of automatically tuned parallel stencil computations on many-core architectures is demonstrated by [19], generating code from a sequential stencil expressed in Fortran 95, and the code generation and auto-tuning framework PATUS [20] with stencils specified in a DSL embedded…”
MethodNitro: A Framework for Adaptive Code Variant Tuning
Muralidharan, S., Shantharam, M., Hall, M. W., et al. (2014) · Proceedings - IEEE International Parallel and Distributed Processing Symposium · doi:10.1109/ipdps.2014.59 · Cited by 66 · see citing works
“Examples of such systems include ATLAS [37], PhiPAC [38], and OSKI [11] for linear algebra, [39], FFTW [40] and SPIRAL [41] for signal processing, [42], [43], [44] for stencil computations, and [45] for sorting.”
MethodCache Accurate Time Skewing in Iterative Stencil Computations
Strzodka, R., Shaheen, M., Pająk, D., & Seidel, H. (2011) · Proceedings of the International Conference on Parallel Processing · doi:10.1109/icpp.2011.47 · Cited by 66 · see citing works
“Recent results show large benefits in applying these techniques on multi-core architectures [5].”
BackgroundLutz, T., Fensch, C., & Cole, M. (2013) · ACM Transactions on Architecture and Code Optimization · doi:10.1145/2400682.2400718 · Cited by 65 · see citing works
Computer Architecture with Associative Processor Replacing Last-Level Cache and SIMD Accelerator
Yavits, L., Morad, A., & Ginosar, R. (2014) · IEEE Transactions on Computers · doi:10.1109/tc.2013.220 · Cited by 56 · see citing works
“parallelizable / low arithmetic intensity (the ratio of computations to memory traffic [25]) workloads, characteristic of low and high (the plateau region) [30], [32].”
BackgroundVerified lifting of stencil computations
Kamil, S. A., Cheung, A., Itzhaky, S., & Solar-Lezama, A. (2016) · ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI) · doi:10.1145/2908080.2908117 · Cited by 54 · see citing works
“We manually constructed Challenge Problems, a set of 27-point 3D stencils based on optimizations used in realworld stencils found in prior work [18, 37].”
BackgroundMethodSelf-citationCache oblivious parallelograms in iterative stencil computations
Strzodka, R., Shaheen, M., Pająk, D., & Seidel, H. (2010) · International Conference on Supercomputing · doi:10.1145/1810085.1810096 · Cited by 53 · see citing works
“Cache Oblivious Parallelograms in Iterative Stencil Robert Strzodka Max Planck Institut Informatik Campus E1 4 Saarbrücken, Germany strzodka@mpi inf.mpg.de Computations Mohammed Shaheen Max Planck Institut Informatik Campus E1 4 Saarbrücken, Germany mshaheen@mpi inf.mpg.de Hans-Peter Seidel Max Planck Institut Infor…”
BackgroundA multi-objective auto-tuning framework for parallel codes
Jordan, H., Thoman, P., Durillo, J. J., et al. (2012) · 2012 International Conference for High Performance Computing, Networking, Storage and Analysis · doi:10.1109/sc.2012.7 · Cited by 49 · see citing works
“application specific solutions including Active Harmony [25], Sequoia [26], PetaBricks [27], [28], and frameworks for tuning parallel stencil computations [29], [30] to compilerbased concepts like our proposal.”
MethodOn Optimizing Complex Stencils on GPUs
Rawat, P. S., Vaidya, M., Sukumaran-Rajam, A., et al. (2019) · Proceedings - IEEE International Parallel and Distributed Processing Symposium · doi:10.1109/ipdps.2019.00073 · Cited by 40 · see citing works
“configuration and/or unrolling factors [26], [38], [39].”
Understanding stencil code performance on multicore architectures
Rahman, S. M. F., Yi, Q., & Qasem, A. (2011) · ACM International Conference on Computing Frontiers (CF) · doi:10.1145/2016604.2016641 · Cited by 38 · see citing works
Extracting ultra-scale Lattice Boltzmann performance via hierarchical and distributed auto-tuning
Williams, S., Oliker, L., Carter, J. T., & Shalf, J. M. (2011) · International Conference for High Performance Computing, Networking, Storage and Analysis (SC) · doi:10.1145/2063384.2063458 · Cited by 38 · see citing works
“For example, auto-tuning premised on auto-generation via a domain specific languages [23] as well as compiler-based approaches have been developed, that through guidance can apply a core set of optimizations to any application [5,12].”
BackgroundMethodSelf-citationProceedings of the 10th Python in Science Conference
(2011) · Proceedings of the Python in Science Conferences · doi:10.25080/majora-ebaa42b7-014 · Cited by 37 · see citing works
Resistive GP-SIMD Processing-In-Memory
Morad, A., Yavits, L., Kvatinsky, S., & Ginosar, R. (2016) · ACM Transactions on Architecture and Code Optimization · doi:10.1145/2845084 · Cited by 36 · see citing works
A Study on Balancing Parallelism, Data Locality, and Recomputation in Existing PDE Solvers
Olschanowsky, C. M., Strout, M. M., Guzik, S. M. J., et al. (2014) · 2012 International Conference for High Performance Computing, Networking, Storage and Analysis · doi:10.1109/sc.2014.70 · Cited by 35 · see citing works
“Kamil et al. [28] perform extensive auto tuning on a space of 4 levels of blocking for the spatial dimensions in the stencil and perform other optimizations like SIMDization.”
MethodPSkel: A stencil programming framework for CPU‐GPU systems
Pereira, A. D., Ramos, L. E. S., & Góes, L. F. W. (2015) · Concurrency and Computation Practice and Experience · doi:10.1002/cpe.3479 · Cited by 33 · see citing works
“[16] propose a framework that automatically parallelizes Fortran 95 stencil kernels into tuned Fortran, C, or CUDA with substan-”
BackgroundAutogeneration and Autotuning of 3D Stencil Codes on Homogeneous and Heterogeneous GPU Clusters
Zhang, Y., & Mueller, F. (2012) · IEEE Transactions on Parallel and Distributed Systems · doi:10.1109/tpds.2012.160 · Cited by 31 · see citing works
“It is suitable for expressing Laplacian stencils [6].”
BackgroundTowards Domain-Specific Computing for Stencil Codes in HPC
Membarth, R., Hannig, F., Teich, J., et al. (2012) · doi:10.1109/sc.companion.2012.136 · Cited by 30 · see citing works
“PATUS (Parallel Auto-Tuned Stencils) [6], [7] is a code generation and auto-tuning framework for stencil computations on shared-memory architectures.”
Efficient 3D stencil computations using CUDA
Krotkiewski, M., & Dąbrowski, M. (2013) · Parallel Computing · doi:10.1016/j.parco.2013.08.002 · Cited by 30 · see citing works
“An auto-tuning framework for modern parallel multi-core CPU architectures was developed by Datta et al. (2008) and Kamil et al. (2010).”
Helium: lifting high-performance stencil kernels from stripped x86 binaries to halide DSL code
Mendis, C., Bosboom, J., Wu, K., et al. (2015) · Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation · doi:10.1145/2737924.2737974 · Cited by 29 · see citing works
“Furthermore, recent programming language and compiler break-throughs have dramatically improved the performance of stencil algorithms [17, 22, 25, 26]; for example, Halide has demonstrated that writing an image processing kernel in a high level DSL and autotuning it to a specific architecture can…”
MethodSelf-citationSPAPT: Search Problems in Automatic Performance Tuning
Balaprakash, P., Wild, S. M., & Norris, B. (2012) · Procedia Computer Science · doi:10.1016/j.procs.2012.04.214 · Cited by 28 · see citing works
“We use the results of this study to discuss some of the characteristics of problems in SPAPT that are highly relevant for autotuning.”
BackgroundMethodResource Conscious Reuse-Driven Tiling for GPUs
Rawat, P. S., Hong, C., Ravishankar, M., et al. (2016) · International Conference on Parallel Architectures and Compilation Techniques · doi:10.1145/2967938.2967967 · Cited by 28 · see citing works
“[11] develop a code generator and an auto-tuning framework, but their code generator does not utilize shared memory for stencil computations.”
BackgroundDenniston, T., Kamil, S., & Amarasinghe, S. P. (2016) · ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming · doi:10.1145/2851141.2851157 · Cited by 28 · see citing works
Self-citationPatus for convenient high-performance stencils: Evaluation in earthquake simulations
Christen, M., Schenk, O., & Cui, Y. (2012) · 2012 International Conference for High Performance Computing, Networking, Storage and Analysis · doi:10.1109/sc.2012.95 · Cited by 26 · see citing works
“[8], [16], [17], [18], [19], [10], [20].”
Parallelization of 2D MPDATA EULAG algorithm on hybrid architectures with GPU accelerators
Wyrzykowski, R., Szustak, Ł., & Rojek, K. (2014) · Parallel Computing · doi:10.1016/j.parco.2014.04.009 · Cited by 25 · see citing works
“An efficient way to solve this problem is software automatic tuning (auto-tuning in short), which is a paradigm enabling software adaptation to a variety of computational conditions [30,16,4].”
Luo, Y., Tan, G., Mo, Z., et al. (2015) · doi:10.1145/2751205.2751214 · Cited by 24 · see citing works
“For this reason, a number of strategies have been applied to speed up search, such as pruning, heuristics and analytical models [17, 9, 25, 52, 31, 19, 41, 20, 33, 12].”
MethodAutomatic Performance Tuning of Stencil Computations on GPUs
Garvey, J. D., & Abdelrahman, T. S. (2015) · Proceedings of the International Conference on Parallel Processing · doi:10.1109/icpp.2015.39 · Cited by 24 · see citing works
Multi-core and many-core shared-memory parallel raycasting volume rendering optimization and tuning
Bethel, E. W., & Howison, M. (2012) · The International Journal of High Performance Computing Applications · doi:10.1177/1094342012440466 · Cited by 24 · see citing works
“…helps empirically establish algorithmic parameters that may be difficult, if not impossible, to determine using a performance model that predicts performance bounds, and has been widely used in the computational science community with great success (Datta et al. 2009b, a; Kamil et al. 2010).”
BackgroundMethodStencil codes on a vector length agnostic architecture
Armejach, A., Caminal, H., Cebrián, J. M., et al. (2018) · International Conference on Parallel Architectures and Compilation Techniques · doi:10.1145/3243176.3243192 · Cited by 23 · see citing works
Yuan, L., Zhang, Y., Guo, P. W., & Huang, S. (2017) · International Conference for High Performance Computing, Networking, Storage and Analysis (SC) · doi:10.1145/3126908.3126920 · Cited by 22 · see citing works
“For stencil computations, a number of auto-tuning frameworks [8, 19, 29, 35, 36, 39, 53, 72], programming models [40, 60] and hand-tuned implementations on CPUs [11, 43, 47, 61, 64], GPUs [9, 33, 44, 46, 49] and Phi [23, 71] have been proposed.”
MethodOne-shot tuner for deep learning compilers
Ryu, J., Park, E., & Sung, H. (2022) · ACM SIGPLAN International Conference on Compiler Construction (CC) · doi:10.1145/3497776.3517774 · Cited by 22 · see citing works
“In general, autotuning approaches the optimization problem as exploring a search space of all optimized codes to locate the bestperforming versionwith hardwaremeasurements [22, 30, 43].”
BackgroundGoing green: optimizing GPUs for energy efficiency through model-steered auto-tuning
Schoonhoven, R., Veenboer, B., van Werkhoven, B., et al. (2022) · doi:10.1109/pmbs56514.2022.00010 · Cited by 22 · see citing works
“sensors [47], [48], [49], [50], [51], [52] often based on custom-”
Architecture-Adaptive Code Variant Tuning
Muralidharan, S., Roy, A., Hall, M. W., Garland, M., & Rai, P. (2016) · International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS) · doi:10.1145/2872362.2872411 · Cited by 20 · see citing works
“Examples of such systems include ATLAS [38], PhiPAC [6], and OSKI [37] for linear algebra, FFTW [18] and SPIRAL [32] for signal processing, and [13],[14],[22].”
MethodProductive high performance parallel programming with auto-tuned domain-specific embedded languages
Yelick, K., Fox, A., & Kamil, S. A. (2012) · Cited by 20 · see citing works
Self-citationImproving cache locality for GPU-based volume rendering
Sugimoto, Y., Ino, F., & Kenichi Hagihara, A. (2014) · Parallel Computing · doi:10.1016/j.parco.2014.03.013 · Cited by 20 · see citing works
“: +81 6 6879 4353; fax: +81 6 6879 4354.”
Automatic code generation and tuning for stencil kernels on modern shared memory architectures
Christen, M., Schenk, O., & Burkhart, H. (2011) · Computer Science - Research and Development · doi:10.1007/s00450-011-0160-6 · Cited by 20 · see citing works
“The autotuning methodology has been applied successfully in diverse libraries and frameworks for various types of kernels which occur frequently in scien-tific computing, including ATLAS, FLAME, OSKI, FFTW, SPIRAL, and recently in a framework for stencil computations [6].”
MethodBasu, P., Williams, S., Straalen, B. V., et al. (2017) · Parallel Computing · doi:10.1016/j.parco.2017.04.002 · Cited by 20 · see citing works
“Of these, [13, 5] do not support shared memory or temporal tiling or large ghost zones on GPUs.”
BackgroundSelf-citationTowards making autotuning mainstream
Basu, P., Hall, M. W., Khan, M. M. Z. M., et al. (2013) · The International Journal of High Performance Computing Applications · doi:10.1177/1094342013493644 · Cited by 19 · see citing works
“…and Whalley, 2005; Qasem and Kennedy, 2006; Pouchet et al., 2007; Datta et al., 2008; Pouchet et al., 2008; Ren et al., 2008; Voronenko et al., 2009; Yi et al., 2007; Hartono et al., 2009; Ansel et al., 2009; Tiwari et al., 2009; Kamil et al., 2010; Christen et al., 2011; Williams et al., 2012).”
BackgroundMethodKamil, S. A., Coetzee, D., & Fox, A. (2011) · Proceedings of the Python in Science Conferences · doi:10.25080/majora-ebaa42b7-00f · Cited by 19 · see citing works
Self-citationNUMA Aware Iterative Stencil Computations on Many-Core Systems
Shaheen, M., & Strzodka, R. (2012) · IEEE International Parallel and Distributed Processing Symposium (IPDPS) · doi:10.1109/ipdps.2012.50 · Cited by 19 · see citing works
Systematic adaptation of stencil‐based 3D MPDATA to GPU architectures
Rojek, K., Wyrzykowski, R., & Kuczyński, Ł. (2016) · Concurrency and Computation Practice and Experience · doi:10.1002/cpe.3970 · Cited by 19 · see citing works
“An efficient way to solve this problem is auto-tuning, which is a paradigm enabling software adaptation to a variety of computational conditions [38, 39].”
BackgroundSourouri, M., Baden, S. B., & Cai, X. H. (2016) · International Journal of Parallel Programming · doi:10.1007/s10766-016-0454-1 · Cited by 19 · see citing works
“However, while DSLs typically require the user to explicitly define the stencil, the Panda compiler is capable of detecting it automatically, like several existing tools [2,6,10,37].”
Model-driven transformations for multi- and many-core CPUs
Kong, M., & Pouchet, L.-N. (2019) · Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation · doi:10.1145/3314221.3314653 · Cited by 19 · see citing works
“Domain specific frameworks such as [9, 17, 28] for stencil computations targeted accelerators and multi-core processors.”
BackgroundSimple, Accurate, Analytical Time Modeling and Optimal Tile Size Selection for GPGPU Stencils
Prajapati, N., Ranasinghe, W., Rajopadhye, S. V., Andonov, R., Djidjev, H. N., & Grosser, T. (2017) · ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming · doi:10.1145/3018743.3018744 · Cited by 17 · see citing works
“Therefore, many authors seek to exploit data locality for these programs [29, 43, 5].”
BackgroundHardware/software co-design of global cloud system resolving models
Wehner, M. F., Oliker, L., Shalf, J. M., et al. (2011) · Journal of Advances in Modeling Earth Systems · doi:10.1029/2011ms000073 · Cited by 17 · see citing works
“We present an example using a recently developed auto-tuning framework for stencil computations [ Kamil et al. , 2010].”
MethodSelf-citationBenchmarking Optimization Algorithms for Auto-Tuning GPU Kernels
Schoonhoven, R., van Werkhoven, B., & Batenburg, K. J. (2022) · IEEE Transactions on Evolutionary Computation · doi:10.1109/tevc.2022.3210654 · Cited by 17 · see citing works
“Furthermore, the same GPU kernel often requires retuning for different input data, hardware, or after changes to the code [18], [24], [40], [41].”
BackgroundPADS: A Pattern-Driven Stencil Compiler-Based Tool for Reuse of Optimizations on GPGPUs
Han, D., Xu, S., Chen, L., et al. (2011) · IEEE International Conference on Parallel and Distributed Systems (ICPADS) · doi:10.1109/icpads.2011.94 · Cited by 16 · see citing works
“In such types of applications, stencil kernels take most of the computation time that is worth additional research.”
BackgroundA Synergetic Approach to Throughput Computing on x86-Based Multicore Desktops
Luk, C.-K., Newton, R. R., Hasenplaugh, W., Hampton, M., & Lowney, G. N. (2010) · IEEE Software · doi:10.1109/ms.2011.2 · Cited by 16 · see citing works
“We rely on autotuningtechniques [2, 6, 9, 12, 15, 16, 23, 24, 25] to tune these parameters.”
MethodOptimizing and Auto-Tuning Iterative Stencil Loops for GPUs with the In-Plane Method
Tang, W. T., Tan, W. J., Krishnamoorthy, R., et al. (2013) · Proceedings - IEEE International Parallel and Distributed Processing Symposium · doi:10.1109/ipdps.2013.79 · Cited by 16 · see citing works
“…related to the underlying hardware architecture, such as the number of registers and limitations in cache sizes, a number of code generation and auto-tuning frameworks have been proposed for stencil computations to select the optimal blocking factors for each level of blocking [17], [22]–[24].”
BackgroundUsing Arm’s scalable vector extension on stencil codes
Armejach, A., Caminal, H., Cebrián, J. M., et al. (2019) · The Journal of Supercomputing · doi:10.1007/s11227-019-02842-5 · Cited by 16 · see citing works
“Many optimizations try to improve data locality, data reuse and other performance-critical factors of stencil computations [19, 20, 21, 22, 23, 24].”
BackgroundEfficient Multi-GPU Shared Memory via Automatic Optimization of Fine-Grained Transfers
Muthukrishnan, H., Nellans, D. W., Lustig, D., et al. (2021) · ACM/IEEE International Symposium on Computer Architecture (ISCA) · doi:10.1109/isca52012.2021.00020 · Cited by 16 · see citing works
An Experimental Study of Global and Local Search Algorithms in Empirical Performance Tuning
Balaprakash, P., Wild, S. M., & Hovland, P. (2013) · Lecture notes in computer science · doi:10.1007/978-3-642-38718-0_26 · Cited by 16 · see citing works
“Using this approach, several researchers have achieved considerable success in tuning scientific kernels for both serial and multicore processors [1, 5, 7, 8, 15, 17].”
BackgroundVerified lifting of stencil computations
Kamil, S. A., Cheung, A., Itzhaky, S., & Solar-Lezama, A. (2016) · ACM SIGPLAN Notices · doi:10.1145/2980983.2908117 · Cited by 18 · see citing works
Self-citationMembarth, R., Reiche, O., Schmitt, C., Hannig, F., Teich, J., Stürmer, M., & Köstler, H. (2014) · Journal of Parallel and Distributed Computing · doi:10.1016/j.jpdc.2014.08.008 · Cited by 15 · see citing works
“PATUS (Parallel Auto-Tuned Stencils) [13, 14] is a code generation and auto-tuning framework for stencil computations on shared-memory architectures.”
BackgroundOverlapping Computation and Communication for Advection on Hybrid Parallel Computers
White, J. B., & Dongarra, J. J. (2011) · Proceedings - IEEE International Parallel and Distributed Processing Symposium · doi:10.1109/ipdps.2011.16 · Cited by 15 · see citing works
Stromme, A., Carlson, R., & Newhall, T. (2012) · International Workshop on Programming Models and Applications for Multicores and Manycores (PMAM) · doi:10.1145/2141702.2141720 · Cited by 15 · see citing works
Autotuning Stencil Computations with Structural Ordinal Regression Learning
Cosenza, B., Durillo, J. J., Ermon, S., et al. (2017) · Proceedings - IEEE International Parallel and Distributed Processing Symposium · doi:10.1109/ipdps.2017.102 · Cited by 15 · see citing works
“Stencil computations have traditionally been optimized with diamond tiling [4], multi-dimensional tiling [5], time skewing [6], SIMD instructions [7], and multi-threading [8].”
MethodMartínez, V., Dupros, F., Castro, M., et al. (2017) · Procedia Computer Science · doi:10.1016/j.procs.2017.05.164 · Cited by 14 · see citing works
Reference Architecture for Self-aware and Self-expressive Computing Systems
Chandra, A., Lewis, P. R., Glette, K., & Stilkerich, S. C. (2016) · Natural computing series · doi:10.1007/978-3-319-39675-0_4 · Cited by 13 · see citing works
TOAST: Automatic tiling for iterative stencil computations on GPUs
Rocha, R. C. O., Pereira, A. D., Ramos, L. E. S., et al. (2017) · Concurrency and Computation Practice and Experience · doi:10.1002/cpe.4053 · Cited by 13 · see citing works
“In summary, our main contributions are as follows: (1) proposing a mathematical optimization model for tiling of stencil computations; (2) implementing the model into a near-optimal tiling mechanism that offers a virtualized GPU global memory for stencil computations, supporting large input data in a transparent manne…”
BackgroundExtendable pattern-oriented optimization directives
Cui, H., Xue, J., Wang, L., et al. (2011) · Symposium on Code Generation and Optimization · doi:10.5555/2190025.2190058 · Cited by 13 · see citing works
Fast Stencil Computations using Fast Fourier Transforms
Ahmad, Z., Chowdhury, R., Das, R., et al. (2021) · ACM Symposium on Parallelism in Algorithms and Architectures (SPAA) · doi:10.1145/3409964.3461803 · Cited by 13 · see citing works
“Due to the importance of stencil computations in scientific computing [41, 59, 108], various methods have been devised to improve their runtime performance on different machine architectures [37, 42, 76, 101, 120].”
MethodHigh performance stencil code generation with Lift
Hagedorn, B., Stoltzfus, L., Steuwer, M., et al. (2018) · doi:10.1145/3179541.3168824 · Cited by 13 · see citing works
TORCH Computational Reference Kernels - A Testbed for Computer Science Research
Kaiser, A., Williams, S. W., Madduri, K., Ibrahim, K. Z., Bailey, D. H., Demmel, J. W., & Strohmaier, E. (2010) · doi:10.2172/1004197 · Cited by 13 · see citing works
“Recent publications [48, 73] have examined these and many other optimizations in the context of CPUs and GPUs.”
BackgroundSelf-citationReducing redundancy in data organization and arithmetic calculation for stencil computations
Li, K., Yuan, L., Zhang, Y., et al. (2021) · 2012 International Conference for High Performance Computing, Networking, Storage and Analysis · doi:10.1145/3458817.3476154 · Cited by 12 · see citing works
“For stencil computations, a variety of auto-tuning frameworks [9, 16, 22, 53] have been presented by using varied hyper-rectangular tiles to exploit data reuse alone.”
MethodMSL: A Synthesis Enabled Language for Distributed Implementations
Xu, Z. L., Kamil, S., & Solar-Lezama, A. (2014) · 2012 International Conference for High Performance Computing, Networking, Storage and Analysis · doi:10.1109/sc.2014.31 · Cited by 12 · see citing works
“To ease development of high performance parallel software, a number of domain-specific languages have been developed, including for PDE solvers [24] and stencil computations [25, 26].”
BackgroundMethodSelf-citationParallelization of Shallow-water Equations with the Algorithmic Skeleton Library SkelGIS
Coullon, H., Minh-Hoang, L., & Sébastien, L. (2013) · Procedia Computer Science · doi:10.1016/j.procs.2013.05.223 · Cited by 12 · see citing works
“Shoaib Kamil & al [21] give an auto-tuning hybrid optimization solution that is very powerful.”
BackgroundAutomatic Differentiation for Adjoint Stencil Loops
Hückelheim, J., Kukreja, N., Narayanan, S. H. K., et al. (2019) · Proceedings of the International Conference on Parallel Processing · doi:10.1145/3337821.3337906 · Cited by 12 · see citing works
“d that index, and more than one thread can read data from the same memory location. Techniques to execute stencils efficiently on multicore CPUs or GPUs have been studied extensively; see for example [17, 24]. Weaimtoapplyreverse-modeautomaticdifferentiationbysourceto-source transformation to such stencil loops. We wi…”
MethodHigh performance computing of stiff bubble collapse on CPU-GPU heterogeneous platform
Dubois, R., da Silva, E. G., & Parnaudeau, P. (2021) · Computers & Mathematics with Applications · doi:10.1016/j.camwa.2021.07.010 · Cited by 12 · see citing works
A review of CUDA optimization techniques and tools for structured grid computing
Al-Mouhamed, M. A., Khan, A. H., & Mohammad, N. (2019) · Computing · doi:10.1007/s00607-019-00744-1 · Cited by 11 · see citing works
“An auto-tuning framework for parallel multicore stencil computations [23] CO A stencil auto-tuning framework to avoid limitation to single kernel instantiations and the difficulty of assembling different kernels into a library”
MethodEfficient Nearest-Neighbor Data Sharing in GPUs
Mahani, N., Sadrosadati, M., Falahati, H., et al. (2020) · ACM Transactions on Architecture and Code Optimization · doi:10.1145/3429981 · Cited by 11 · see citing works
“In stencil codes, the value of each point in a structured grid is updated as a function of the values of a subset of its nearest neighbors [22, 40].”
BackgroundModeling Stencil Computations on Modern HPC Architectures
de la Cruz, R., & Araya–Polo, M. (2015) · Lecture notes in computer science · doi:10.1007/978-3-319-17248-4_8 · Cited by 11 · see citing works
“To alleviate the cumbersome optimization process from user supervision, several auto-tuning frameworks [10, 3] have been developed to automatize the search by using heuristics to guide the parameter subspace.”
MethodAn Auto-Tuner for OpenCL Work-Group Size on GPUs
Dao, T. T., & Lee, J. (2017) · IEEE Transactions on Parallel and Distributed Systems · doi:10.1109/tpds.2017.2755657 · Cited by 11 · see citing works
“ALTHOUGH the benefit of selecting a good work-group size for GPUs have been widely studied for performance portability [8], [9], [11], [28], [34], there is still no satisfactory analysis on the reasons that cause the performance”
BackgroundInfluentialPerformance Tuning and Analysis for Stencil-Based Applications on POWER8 Processor
Xu, J., Fu, H., Shi, W., et al. (2018) · ACM Transactions on Architecture and Code Optimization · doi:10.1145/3264422 · Cited by 11 · see citing works
“…Computing (HPC) devices, such as Central Processing Unit (CPU), Graphics Processing Unit (GPU), Knights Landing (KNL), and Field-Programmable Gate Array (FPGA) (Datta et al. 2008; Kamil et al. 2010; Strzodka et al. 2011; Gan et al. 2013; Gan et al. 2014b; Gan et al. 2017; Cebrián et al. 2017).”
MethodAutomated and parallel code generation for finite-differencing stencils with arbitrary data types
Hawick, K. A., & Playne, D. P. (2010) · Procedia Computer Science · doi:10.1016/j.procs.2010.04.201 · Cited by 11 · see citing works
Energy‐aware mechanism for stencil‐based MPDATA algorithm with constraints
Rojek, K., Ilić, A., Wyrzykowski, R., et al. (2016) · Concurrency and Computation Practice and Experience · doi:10.1002/cpe.4016 · Cited by 11 · see citing works
Performance engineering to achieve real-time high dynamic range imaging
Köstler, H., Stürmer, M., & Pohl, T. (2013) · Journal of Real-Time Image Processing · doi:10.1007/s11554-012-0312-3 · Cited by 10 · see citing works
“Next we plan to compare our performance on NVIDIA GPUs to AMD graphics cards and CPU implementations of OpenCL.”
InfluentialAutotuning programs with algorithmic choice
Ansel, J. (2014) · Cited by 11 · see citing works
Online auto-tuning for the time-step-based parallel solution of ODEs on shared-memory systems
Kalinnik, N., Korch, M., & Rauber, T. (2014) · Journal of Parallel and Distributed Computing · doi:10.1016/j.jpdc.2014.03.006 · Cited by 10 · see citing works
Automatic differentiation for adjoint stencil loops
Hückelheim, J., Kukreja, N., Narayanan, S., et al. (2019) · Spiral (Imperial College London) · Cited by 10 · see citing works
GPU-accelerated denoising of 3D magnetic resonance images
Howison, M., & Bethel, E. W. (2014) · Journal of Real-Time Image Processing · doi:10.1007/s11554-014-0436-8 · Cited by 9 · see citing works
“This approach has been used with success to optimize performance of stencil-based codes on multicore CPUs and many-core GPUs [8, 14, 17, 20, 33].”
MethodInfluentialBioFVM-X: An MPI+OpenMP 3-D Simulator for Biological Systems
Saxena, G., Ponce-de-León, M., Montagud, A., et al. (2021) · Lecture notes in computer science · doi:10.1007/978-3-030-85633-5_18 · Cited by 9 · see citing works
Tiling Optimizations for Stencil Computations Using Rewrite Rules in L ift
Stoltzfus, L., Hagedorn, B., Steuwer, M., et al. (2019) · ACM Transactions on Architecture and Code Optimization · doi:10.1145/3368858 · Cited by 9 · see citing works
Algorithmic skeleton library for scientific simulations: SkelGIS
Coullon, H., & Limet, S. (2013) · International Conference on High Performance Computing & Simulation (HPCS) · doi:10.1109/hpcsim.2013.6641450 · Cited by 7 · see citing works
“The current version of SKelGIS, then, is close to what is called stencil programming [15].”
BackgroundSelf-aware Object Tracking in Multi-Camera Networks
Esterle, L., Simonjan, J., Nebehay, G., Pflugfelder, R. P., Domínguez, G. F., & Rinner, B. (2016) · Natural computing series · doi:10.1007/978-3-319-39675-0_13 · Cited by 8 · see citing works
Autotuning OpenCL Workgroup Size for Stencil Patterns
Cummins, C., Petoumenos, P., Steuwer, M., et al. (2015) · ENLIGHTEN (Jurnal Bimbingan dan Konseling Islam) · doi:10.48550/arxiv.1511.02490 · Cited by 8 · see citing works
“A DSL and CUDA code generator for stencils is presented in [13].”
MethodAuto-tuning for GPGPU applications using performance and energy model
Lin, C.-S., Teng, S.-M., & Hsiung, P. (2016) · Journal of Systems Architecture · doi:10.1016/j.sysarc.2015.11.012 · Cited by 8 · see citing works
Wichmann, K.-R., Kronbichler, M., Löhner, R., & Wall, W. A. (2018) · The International Journal of High Performance Computing Applications · doi:10.1177/1094342018774126 · Cited by 9 · see citing works
“The second step is a Laplace operator stencil, which already incorporates the star-shaped stencil structure also found in the FD stencil (Datta et al., 2009; Kamil et al., 2010).”
BackgroundDenniston, T., Kamil, S., & Amarasinghe, S. P. (2016) · ACM SIGPLAN Notices · doi:10.1145/3016078.2851157 · Cited by 8 · see citing works
Self-citation
- Authors
- Kamil, S., Chan, C., Oliker, L., Shalf, J., & Williams, S.
- Affiliations
- Lawrence Berkeley National Laboratory (US)
- Venue
- 2010 IEEE International Symposium on Parallel & Distributed Processing (IPDPS)
- Publisher
- IEEE
- Published
- 2010
- Pages
- 1-12
- ISSN
- 1530-2075 (ISSN-L)
- OpenAlex
- W2135682468
- Semantic Scholar
- 7b1928d4a3a141998a04290a52522062b666559f
- Cited by
- 209
- References
- 31
- Citations by year
- 2026: 2 · 2025: 1 · 2024: 1 · 2023: 1 · 2022: 6 · 2021: 8 · 2020: 5 · 2019: 11 · 2018: 14 · 2017: 16 · 2016: 24 · 2015: 18 · 2014: 27 · 2013: 22 · 2012: 22
- FWCI
- 14.35
- Type
- conference paper
- Language
- en
- Open access
- green
- escholarship.org
- Locations
- IEEE International Parallel and Distributed Processing Symposium (IPDPS) (publishedVersion)
- eScholarship (California Digital Library) (submittedVersion)
- Funders
- Nvidia
- Topics
- Physical Sciences › Computer Science › Hardware and Architecture › Parallel Computing and Optimization Techniques
- Physical Sciences › Computer Science › Computer Graphics and Computer-Aided Design › Computer Graphics and Visualization Techniques
- Physical Sciences › Computer Science › Hardware and Architecture › Embedded Systems Design Techniques
- Keywords
- stencil computations, auto-tuning, multi-core processors, GPU computing, CUDA, Fortran, performance portability
About these checks
Registry, retraction, Cites and statistics results are computed, not judged, with one exception: a printed reference that no index lists is read once by a model before it counts as a citation error. Claims are extracted by a model and kept only when their quote appears verbatim in the text; each cited source is then checked, with a model’s help, for whether it says what the claim relies on. Those verdicts can be wrong — read the claim’s quote and the cited source before relying on one.
Claims read by deepseek-v4.1-flash under definition version 3 (extract-v3) on 2026-10-11.
Classified by jev-1.13-20260917 (gold-guideline-v0.2) on 2026-10-11.
Cited sources are checked by gpt-6-sol.
Statistics and arithmetic are recomputed, not judged.
Confidence bands are shown only for fields calibrated on our annotated test set. None is calibrated yet, so no band is shown.
What counts as a claim ›How we measure confidence ›How we check this ›
Are you an author, or do you see a problem with this page? Request a review