The DOI matches its Crossref record.
Processor Design in 3D Die-Stacking Technologies
Abstract
Three-dimensional integration is an emerging fabrication technology that vertically stacks multiple integrated chips. The benefits include an increase in device density; much greater flexibility in routing signals, power, and clock; the ability to integrate disparate technologies; and the potential for new 3D circuit and microarchitecture organizations. This article provides a technical introduction to the technology and its impact on processor design. Although our discussions here primarily focus on high-performance processor design, most of the observations and conclusions apply to other microprocessor market segments.
Overview
The claims and statistics of this paper haven’t been checked yet.
Run the check — free, no account needed. It reads the open-access text and checks the sources it cites.
Integrity signals
Registry
Cites
Statistics
Verification
Claims the paper makes
The claims and statistics of this paper haven’t been checked yet.
Run the check — free, no account needed. It reads the open-access text and checks the sources it cites.
Self-check
Percentages, sums and reported differences re-computed from the paper’s own numbers.
The self-check needs the paper’s full text.
Citations
Cited by
An overview of through-silicon-via technology and manufacturing challenges
Gambino, J. P., Adderly, S. A., & Knickerbocker, J. U. (2015) · Microelectronic Engineering · doi:10.1016/j.mee.2014.10.019 · Cited by 317
3D DRAM Design and Application to 3D Multicore Systems
Sun, H., Liu, J., Anigundi, R. S., Zheng, N., Lu, J.-Q., Rose, K., & Zhang, T. (2009) · IEEE Design & Test of Computers · doi:10.1109/mdt.2009.105 · Cited by 53
Metadata
- Authors
- Loh, G. H., Xie, Y., & Black, B.
- Venue
- IEEE Micro
- Published
- 2007-05
- Volume
- 27
- Issue
- 3
- Pages
- 31-48
- ISSN
- 0272-1732 (ISSN-L)
- OpenAlex
- W2046574526
- Cited by
- 292
- References
- 0
- FWCI
- 23.31
- Type
- journal article
- Language
- en
- Open access
- closed
About these checks
Registry, retraction, Cites and statistics results are computed, not judged, with one exception: a printed reference that no index lists is read once by a model before it counts as a citation error. Claims are extracted by a model and kept only when their quote appears verbatim in the text; each cited source is then checked, with a model’s help, for whether it says what the claim relies on. Those verdicts can be wrong — read the claim’s quote and the cited source before relying on one.
Statistics and arithmetic are recomputed, not judged.
Confidence bands are shown only for fields calibrated on our annotated test set. None is calibrated yet, so no band is shown.
What counts as a claim ›How we measure confidence ›How we check this ›
Are you an author, or do you see a problem with this page? Request a review
How to cite
Cite CoChat for the checks on this page, and the paper for its own findings.
- This page
- CoChat. (2026). Citation check: Processor Design in 3D Die-Stacking Technologies. https://app.cochat.ai/papers/10.1109/mm.2007.59
- The paper
- Loh, G. H., Xie, Y., & Black, B. (2007). Processor Design in 3D Die-Stacking Technologies. IEEE Micro. https://doi.org/10.1109/mm.2007.59
Data sources
Bibliographic data: Semantic Scholar, OpenAlex, Crossref.
Contains information from the Semantic Scholar Academic Graph Datasets, made available under the ODC Attribution License (ODC-BY 1.0).
Semantic Scholar’s data is described in: Kinney, R., et al. (2023). The Semantic Scholar Open Data Platform. arXiv:2301.10140.
