The DOI matches its Crossref record; 8 of the 8 references it cites were found in a registry or an index.
Optimal interconnection circuits for VLSI
Abstract
The propagation delay of interconnection lines is a major factor in determining the performance Of VLSI circuits because the RC time delay of these lines increases rapidly as chip size is increased and cross-sectional interconnection dimensions are reduced. In this paper, a model for interconnection time delay is developed that includes the effects of scaling transistor, interconnection, and chip dimensions. The delays of aluminum, WSi2, and polysilicon lines are compared, and propagation delays in future VLSI circuits are projected. Properly scaled multilevel conductors, repeaters, cascaded drivers, and cascaded driver/ repeater combinations are investigated as potential methods for reducing propagation delay. The model yields optimal cross-sectional interconnection dimensions and driver/repeater configurations that can lower propagation delays by more than an order of magnitude in MOSFET circuits.
Overview
The claims and statistics of this paper haven’t been checked yet.
Run the check — free, no account needed. It reads the open-access text and checks the sources it cites.
Integrity signals
Registry
Cites
Statistics
Verification
Claims the paper makes
The claims and statistics of this paper haven’t been checked yet.
Run the check — free, no account needed. It reads the open-access text and checks the sources it cites.
Self-check
Percentages, sums and reported differences re-computed from the paper’s own numbers.
The self-check needs the paper’s full text.
Citations
Cites
Introduction to V.L.S.I. Systems
Mead, C. (1981) · IEE Proceedings I Solid State and Electron Devices · doi:10.1049/ip-i-1.1981.0010 · Cited by 3,720
Design of ion-implanted MOSFET's with very small physical dimensions
Dennard, R. H., Gaensslen, F. H., Yu, H.-N., Rideout, V. L., Bassous, E., & LeBlanc, A. R. (1974) · IEEE Journal of Solid-State Circuits · doi:10.1109/jssc.1974.1050511 · Cited by 3,548
Mayadas, A. F., & Shatzkes, M. (1970) · Physical Review B · doi:10.1103/physrevb.1.1382 · Cited by 2,210
Simple formulas for two- and three-dimensional capacitances
Sakurai, T., & Tamaru, K. (1983) · IEEE Transactions on Electron Devices · doi:10.1109/t-ed.1983.21093 · Cited by 463
Approximation of wiring delay in MOSFET LSI
Sakurai, T. (1983) · IEEE Journal of Solid-State Circuits · doi:10.1109/jssc.1983.1051966 · Cited by 406
A comparison of semiconductor devices for high-speed logic
Solomon, P. M. (1982) · Proceedings of the IEEE · doi:10.1109/proc.1982.12333 · Cited by 191
Survey of Computer-Aided Electrical Analysis of Integrated Circuit Interconnections
Ruehli, A. E. (1979) · IBM Journal of Research and Development · doi:10.1147/rd.236.0626 · Cited by 112
The evolution of digital electronics towards VLSI
Keyes, R. W. (1979) · IEEE Transactions on Electron Devices · doi:10.1109/t-ed.1979.19424 · Cited by 61
Cited by
Low power microelectronics: retrospect and prospect
Meindl, J. D. (1995) · Proceedings of the IEEE · doi:10.1109/5.371970 · Cited by 316
Self-citationLanzerotti, M. Y., Fiorenza, G., & Rand, R. A. (2005) · IBM Journal of Research and Development · doi:10.1147/rd.494.0777 · Cited by 47
Metadata
- Authors
- Bakoglu, H. B., & Meindl, J. D.
- Venue
- IEEE Transactions on Electron Devices
- Published
- 1985-05
- Volume
- 32
- Issue
- 5
- Pages
- 903-909
- ISSN
- 0018-9383 (ISSN-L)
- 1557-9646
- OpenAlex
- W2151817873
- Cited by
- 435
- References
- 8
- FWCI
- 6.59
- Type
- journal article
- Language
- en
- Open access
- closed
About these checks
Registry, retraction, Cites and statistics results are computed, not judged, with one exception: a printed reference that no index lists is read once by a model before it counts as a citation error. Claims are extracted by a model and kept only when their quote appears verbatim in the text; each cited source is then checked, with a model’s help, for whether it says what the claim relies on. Those verdicts can be wrong — read the claim’s quote and the cited source before relying on one.
Statistics and arithmetic are recomputed, not judged.
Confidence bands are shown only for fields calibrated on our annotated test set. None is calibrated yet, so no band is shown.
What counts as a claim ›How we measure confidence ›How we check this ›
Are you an author, or do you see a problem with this page? Request a review
How to cite
Cite CoChat for the checks on this page, and the paper for its own findings.
- This page
- CoChat. (2026). Citation check: Optimal interconnection circuits for VLSI. https://app.cochat.ai/papers/10.1109/t-ed.1985.22046
- The paper
- Bakoglu, H. B., & Meindl, J. D. (1985). Optimal interconnection circuits for VLSI. IEEE Transactions on Electron Devices. https://doi.org/10.1109/t-ed.1985.22046
Data sources
Bibliographic data: Semantic Scholar, OpenAlex, Crossref.
Contains information from the Semantic Scholar Academic Graph Datasets, made available under the ODC Attribution License (ODC-BY 1.0).
Semantic Scholar’s data is described in: Kinney, R., et al. (2023). The Semantic Scholar Open Data Platform. arXiv:2301.10140.