Fully Digital Random Bit Generators for Cryptographic Applications
Abstract
This paper is devoted to the analysis, implementation, and modeling of fully digital random bit generators based on recent research results on the design ofstatelessoscillator-based generators. A new approach to the data quality test is adopted where, instead of passing bunches of statistical tests on the raw data, the focus is on the verification of a minimum entropy limit for the delivered random numbers after the digital post-processing. The architecture of the proposed generator (noise source and post-processing algorithm) is described in detail and experimental results in a 90-nm CMOS process are reported. The fabricated device reaches a throughput of 1.74 Mb/s after post-processing with an area of 13000 mum2and a power consumption of about 240 muW when running at its maximum speed. A statistical model for the noise source is provided and the entropy of the post-processed data has been evaluated obtaining an entropy per byte higher than 7.999.
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Coupled-oscillator TRNGs can be designed purely digital and without an amplifier, but precisely matching the period of coupled oscillators is hard and frequency drift makes them not robust.
“TRNGs based on coupled oscillator can be designed purely digital and without amplifier.Subsequently, some researches realized it and provided some methods to enhance its performance [23], [37], [51].However, precisely matching the period of coupled oscillators is quite hard and two signals of frequency oscillators may drift relative to one another.These don't make for very robust TRNG designs.”
From True Random Number Generators Using Electrical Noise (2019) · cites this paper as [23]
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Mathew, S. K., Johnston, D., Satpathy, S., Suresh, V., Newman, P., Anders, M. A., Kaul, H., Agarwal, A., Hsu, S. K., Chen, G., et al. (2016) · IEEE Journal of Solid-State Circuits · doi:10.1109/jssc.2016.2558490 · Cited by 102 · see citing works
True Random Number Generators Using Electrical Noise
Gong, L., Zhang, J., Liu, H., Sang, L., & Wang, Y. (2019) · IEEE Access · doi:10.1109/access.2019.2939027 · Cited by 77 · see citing works
“Subsequently, some researches realized it and provided some methods to enhance its performance [23], [37], [51].”
MethodTrue Random Number Generation Via Sampling From Flat Band-Limited Gaussian Processes
Gov, N. C., Mihcak, M. K., & Ergun, S. (2011) · IEEE Transactions on Circuits and Systems I: Regular Papers · doi:10.1109/tcsi.2010.2089561 · Cited by 48 · see citing works
- Authors
- Bucci, M., & Luzzi, R.
- Affiliations
- Infineon Technologies (Austria) (AT)
- Venue
- IEEE Transactions on Circuits and Systems I: Regular Papers
- Published
- 2008-04
- Volume
- 55
- Issue
- 3
- Pages
- 861-875
- ISSN
- 1549-8328 (ISSN-L)
- 1558-0806
- OpenAlex
- W2154519861
- Cited by
- 46
- References
- 0
- Citations by year
- 2025: 1 · 2024: 3 · 2023: 3 · 2022: 2 · 2021: 4 · 2020: 1 · 2019: 6 · 2018: 2 · 2017: 1 · 2016: 5 · 2015: 4 · 2014: 3 · 2013: 3 · 2012: 1
- FWCI
- 4.84
- Type
- journal article
- Language
- en
- Open access
- closed
- Locations
- IEEE Transactions on Circuits and Systems I Regular Papers (publishedVersion)
- Topics
- Physical Sciences › Computer Science › Hardware and Architecture › Physical Unclonable Functions (PUFs) and Hardware Security
- Physical Sciences › Engineering › Biomedical Engineering › Analog and Mixed-Signal Circuit Design
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Low-power high-performance VLSI design
- Keywords
- random bit generator, 90 nm CMOS, low-power electronics, cryptographic randomness, entropy estimation
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