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A 90-nm logic technology featuring strained-silicon
Abstract
A leading-edge 90-nm technology with 1.2-nm physical gate oxide, 45-nm gate length, strained silicon, NiSi, seven layers of Cu interconnects, and low-/spl kappa/ CDO for high-performance dense logic is presented. Strained silicon is used to increase saturated n-type and p-type metal-oxide-semiconductor field-effect transistors (MOSFETs) drive currents by 10% and 25%, respectively. Using selective epitaxial Si/sub 1-x/Ge/sub x/ in the source and drain regions, longitudinal uniaxial compressive stress is introduced into the p-type MOSEFT to increase hole mobility by >50%. A tensile silicon nitride-capping layer is used to introduce tensile strain into the n-type MOSFET and enhance electron mobility by 20%. Unlike all past strained-Si work, the hole mobility enhancement in this paper is present at large vertical electric fields in nanoscale transistors making this strain technique useful for advanced logic technologies. Furthermore, using piezoresistance coefficients it is shown that significantly less strain (/spl sim/5 /spl times/) is needed for a given PMOS mobility enhancement when applied via longitudinal uniaxial compression versus in-plane biaxial tension using the conventional Si/sub 1-x/Ge/sub x/ substrate approach.
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Cited by
Schaibley, J. R., Yu, H., Clark, G., Rivera, P., Ross, J. S., Seyler, K. L., Yao, W., & Xu, X. (2016) · Nature Reviews Materials · doi:10.1038/natrevmats.2016.55 · Cited by 2,652
Nanowire transistors without junctions
Colinge, J.-P., Lee, C.-W., Afzalian, A., Akhavan, N. D., Yan, R., Ferain, I., Razavi, P., O'Neill, B., Blake, A., White, M., et al. (2010) · Nature Nanotechnology · doi:10.1038/nnano.2010.15 · Cited by 2,380
Viventi, J., Kim, D.-H., Vigeland, L., Frechette, E. S., Blanco, J. A., Kim, Y.-S., Avrin, A. E., Tiruvadi, V. R., Hwang, S.-W., Vanleer, A. C., et al. (2011) · Nature Neuroscience · doi:10.1038/nn.2973 · Cited by 1,136
A Conformal, Bio-Interfaced Class of Silicon Electronics for Mapping Cardiac Electrophysiology
Viventi, J., Kim, D.-H., Moss, J. D., Kim, Y.-S., Blanco, J. A., Annetta, N., Hicks, A., Xiao, J., Huang, Y., Callans, D. J., et al. (2010) · Science Translational Medicine · doi:10.1126/scitranslmed.3000738 · Cited by 420
An overview of through-silicon-via technology and manufacturing challenges
Gambino, J. P., Adderly, S. A., & Knickerbocker, J. U. (2015) · Microelectronic Engineering · doi:10.1016/j.mee.2014.10.019 · Cited by 317
Metadata
- Authors
- Thompson, S. E., Armstrong, M., Auth, C., Alavi, M., Buehler, M., Chau, R., Cea, S., Ghani, T., Glass, G., Hoffman, T., Jan, C.-H., Kenyon, C., Klaus, J., Kuhn, K., Ma, Z., Mcintyre, B., Mistry, K., Murthy, A., Obradovic, B., Nagisetty, R., Nguyen, P., Sivakumar, S., Shaheed, R., Shifren, L., Tufts, B., Tyagi, S., Bohr, M., & El-Mansy, Y.
- Venue
- IEEE Transactions on Electron Devices
- Published
- 2004-11
- Volume
- 51
- Issue
- 11
- Pages
- 1790-1797
- ISSN
- 0018-9383 (ISSN-L)
- 1557-9646
- OpenAlex
- W2154869256
- Cited by
- 671
- References
- 0
- FWCI
- 35.64
- Type
- journal article
- Language
- en
- Open access
- closed
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- The paper
- Thompson, S. E., Armstrong, M., Auth, C., Alavi, M., Buehler, M., Chau, R., Cea, S., Ghani, T., Glass, G., Hoffman, T., Jan, C.-H., Kenyon, C., Klaus, J., Kuhn, K., Ma, Z., Mcintyre, B., Mistry, K., Murthy, A., Obradovic, B., . . . El-Mansy, Y. (2004). A 90-nm logic technology featuring strained-silicon. IEEE Transactions on Electron Devices. https://doi.org/10.1109/ted.2004.836648
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Contains information from the Semantic Scholar Academic Graph Datasets, made available under the ODC Attribution License (ODC-BY 1.0).
Semantic Scholar’s data is described in: Kinney, R., et al. (2023). The Semantic Scholar Open Data Platform. arXiv:2301.10140.
