The DOI matches its Crossref record; 21 of the 21 references it cites were found in a registry or an index.
Program optimization space pruning for a multithreaded gpu
Abstract
Program optimization for highly-parallel systems has historically been considered an art, with experts doing much of the performance tuning by hand. With the introduction of inexpensive, single-chip, massively parallel platforms, more developers will be creating highly-parallel applications for these platforms, who lack the substantial experience and knowledge needed to maximize their performance. This creates a need for more structured optimization methods with means to estimate their performance effects. Furthermore these methods need to be understandable by most programmers. This paper shows the complexity involved in optimizing applications for one such system and one relatively simple methodology for reducing the workload involved in the optimization process.
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Cites
Optimizing Compilers for Modern Architectures: A Dependence-based Approach
Kennedy, K., & Allen, J. R. (2001) · Cited by 1,024
The cache performance and optimizations of blocked algorithms
Lam, M. D., Rothberg, E. E., & Wolf, M. E. (1991) · Proceedings of the fourth international conference on Architectural support for programming languages and operating systems - ASPLOS-IV · doi:10.1145/106972.106981 · Cited by 921
Optimization principles and application performance evaluation of a multithreaded GPU using CUDA
Ryoo, S., Rodrigues, C. I., Baghsorkhi, S. S., Stone, S. S., Kirk, D. B., & Hwu, W.-M. W. (2008) · Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming · doi:10.1145/1345206.1345220 · Cited by 903
Self-citationAccelerating molecular modeling applications with graphics processors
Stone, J. E., Phillips, J. C., Freddolino, L., Hardy, D. J., Trabuco, L. G., & Schulten, K. (2007) · Journal of Computational Chemistry · doi:10.1002/jcc.20829 · Cited by 739
Supercompilers for parallel and vector computers
Zima, H. P., & Chapman, B. (1990) · Medical Entomology and Zoology · Cited by 656
Maximizing multiprocessor performance with the SUIF compiler
Hall, M. W., Anderson, J. M., Amarasinghe, S. P., Murphy, B. R., Liao, S.-W., Bugnion, E., & Lam, M. S. (1996) · Computer · doi:10.1109/2.546613 · Cited by 572
NVIDIA cuda software and gpu parallel computing architecture
Kirk, D. (2007) · Proceedings of the 6th international symposium on Memory management · doi:10.1145/1296907.1296909 · Cited by 435
Using Machine Learning to Focus Iterative Optimization
Agakov, F. V., Bonilla, E. V., Cavazos, J. E., et al. (2006) · International Symposium on Code Generation and Optimization (CGO) · doi:10.1109/cgo.2006.37 · Cited by 425
Understanding the efficiency of GPU algorithms for matrix-matrix multiplication
Fatahalian, K., Sugerman, J., & Hanrahan, P. (2004) · Proceedings of the ACM SIGGRAPH/EUROGRAPHICS conference on Graphics hardware · doi:10.1145/1058129.1058148 · Cited by 309
Accelerator: using data parallelism to program GPUs for general-purpose uses
Tarditi, D., Puri, S., & Oglesby, J. (2006) · Proceedings of the 12th international conference on Architectural support for programming languages and operating systems · doi:10.1145/1168857.1168898 · Cited by 294
Cited by
Accelerating advanced MRI reconstructions on GPUs
Stone, S. S., Haldar, J. P., Tsao, S. C., Hwu, W.-M. W., Sutton, B. P., & Liang, Z.-P. (2008) · Journal of Parallel and Distributed Computing · doi:10.1016/j.jpdc.2008.05.013 · Cited by 249
Self-citationOn the Efficacy of a Fused CPU+GPU Processor (or APU) for Parallel Computing
Daga, M., Aji, A. M., & Feng, W.-C. (2011) · 2011 Symposium on Application Accelerators in High-Performance Computing · doi:10.1109/saahpc.2011.29 · Cited by 84
The tradeoffs of fused memory hierarchies in heterogeneous computing architectures
Spafford, K. L., Meredith, J. S., Lee, S., Li, D., Roth, P. C., & Vetter, J. S. (2012) · Proceedings of the 9th conference on Computing Frontiers · doi:10.1145/2212908.2212924 · Cited by 49
Metadata
- Authors
- Ryoo, S., Rodrigues, C. I., Stone, S. S., Baghsorkhi, S. S., Ueng, S.-Z., Stratton, J. A., & Hwu, W.-M. W.
- Venue
- Proceedings of the 6th annual IEEE/ACM international symposium on Code generation and optimization
- Publisher
- ACM
- Published
- 2008-04-06
- Pages
- 195-204
- OpenAlex
- W2153492376
- Cited by
- 285
- References
- 21
- FWCI
- 23.42
- Type
- conference paper
- Language
- en
- Open access
- closed
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- The paper
- Ryoo, S., Rodrigues, C. I., Stone, S. S., Baghsorkhi, S. S., Ueng, S.-Z., Stratton, J. A., & Hwu, W.-M. W. (2008). Program optimization space pruning for a multithreaded gpu. Proceedings of the 6th annual IEEE/ACM international symposium on Code generation and optimization. https://doi.org/10.1145/1356058.1356084
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Bibliographic data: Semantic Scholar, OpenAlex, Crossref.
Contains information from the Semantic Scholar Academic Graph Datasets, made available under the ODC Attribution License (ODC-BY 1.0).
Semantic Scholar’s data is described in: Kinney, R., et al. (2023). The Semantic Scholar Open Data Platform. arXiv:2301.10140.
