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The tradeoffs of fused memory hierarchies in heterogeneous computing architectures
Abstract
With the rise of general purpose computing on graphics processing units (GPGPU), the influence from consumer markets can now be seen across the spectrum of computer architectures. In fact, many of the high-ranking Top500 HPC systems now include these accelerators. Traditionally, GPUs have connected to the CPU via the PCIe bus, which has proved to be a significant bottleneck for scalable scientific applications. Now, a trend toward tighter integration between CPU and GPU has removed this bottleneck and unified the memory hierarchy for both CPU and GPU cores. We examine the impact of this trend for high performance scientific computing by investigating AMD's new Fusion Accelerated Processing Unit (APU) as a testbed. In particular, we evaluate the tradeoffs in performance, power consumption, and programmability when comparing this unified memory hierarchy with similar, but discrete GPUs.
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For applications where GPU memory bandwidth acts as a bottleneck, computational resources of GPUs remain underutilized.
“Similarly, for applications where the GPU memory bandwidth acts as a bottleneck [Daga et al. 2011;Spafford et al. 2012], the computational resources of GPUs remain underutilized.”
From A Survey of CPU-GPU Heterogeneous Computing Techniques (2015) · cites this paper as Spafford et al. 2012
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A Survey of CPU-GPU Heterogeneous Computing Techniques
Mittal, S., & Vetter, J. S. (2015) · ACM Computing Surveys · doi:10.1145/2788396 · Cited by 568
Self-citation
Metadata
- Authors
- Spafford, K. L., Meredith, J. S., Lee, S., Li, D., Roth, P. C., & Vetter, J. S.
- Affiliations
- Oak Ridge National Laboratory (US)
- Venue
- Proceedings of the 9th conference on Computing Frontiers
- Publisher
- ACM
- Published
- 2012-05-15
- Pages
- 103-112
- OpenAlex
- W1976534780
- Cited by
- 49
- References
- 0
- Citations by year
- 2025: 2 · 2024: 1 · 2022: 1 · 2020: 5 · 2019: 2 · 2018: 3 · 2017: 4 · 2016: 2 · 2015: 10 · 2014: 8 · 2013: 9 · 2012: 2
- FWCI
- 5.57
- Type
- conference paper
- Language
- en
- Open access
- closed
- Locations
- ACM International Conference on Computing Frontiers (CF) (publishedVersion)
- Funders
- Oak Ridge National Laboratory
- Topics
- Physical Sciences › Computer Science › Hardware and Architecture › Parallel Computing and Optimization Techniques
- Physical Sciences › Computer Science › Computer Networks and Communications › Interconnection Networks and Systems
- Physical Sciences › Computer Science › Computer Graphics and Computer-Aided Design › Computer Graphics and Visualization Techniques
- Keywords
- heterogeneous computing, power consumption, programmability, high-performance scientific computing, GPGPU
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