The DOI matches its Crossref record; 6 of the 6 references it cites were found in a registry or an index.
DianNao: a small-footprint high-throughput accelerator for ubiquitous machine-learning
Abstract
Machine-Learning tasks are becoming pervasive in a broad range of domains, and in a broad range of systems (from embedded systems to data centers). At the same time, a small set of machine-learning algorithms (especially Convolutional and Deep Neural Networks, i.e., CNNs and DNNs) are proving to be state-of-the-art across many applications. As architectures evolve towards heterogeneous multi-cores composed of a mix of cores and accelerators, a machine-learning accelerator can achieve the rare combination of efficiency (due to the small number of target algorithms) and broad application scope.
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Cites
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Cited by
Han (2023) · doi:10.1109/tpami.2022.3152247 · Cited by 4,682
Efficient Processing of Deep Neural Networks: A Tutorial and Survey
Sze, V., Chen, Y.-H., Yang, T.-J., & Emer, J. S. (2017) · Proceedings of the IEEE · doi:10.1109/jproc.2017.2761740 · Cited by 4,215
“DNN Timeline • 1940s - Neural networks were proposed • 1960s - Deep neural networks were proposed • 1989 - Neural networks for recognizing digits (LeNet) • 1990s - Hardware for shallow neural nets (Intel ETANN) • 2011 - Breakthrough DNN-based speech recognition (Microsoft) • 2012 - DNNs for vision start supplanting ha…”
InfluentialSelf-citationEyeriss: An Energy-Efficient Reconfigurable Accelerator for Deep Convolutional Neural Networks
Chen, Y.-H., Krishna, T., Emer, J. S., & Sze, V. (2017) · IEEE Journal of Solid-State Circuits · doi:10.1109/jssc.2016.2616357 · Cited by 3,247
Self-citationBinaryConnect: Training Deep Neural Networks with binary weights during propagations
Courbariaux, M., Bengio, Y., & David, J.-P. (2015) · arXiv · doi:10.48550/arxiv.1511.00363 · Cited by 2,180
Optimizing FPGA-based Accelerator Design for Deep Convolutional Neural Networks
Zhang, C., Li, P., Sun, G., Guan, Y., Xiao, B., & Cong, J. (2015) · Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays · doi:10.1145/2684746.2689060 · Cited by 2,158
Metadata
- Authors
- Chen, T., Du, Z., Sun, N., Wang, J., Wu, C., Chen, Y., & Temam, O.
- Venue
- Proceedings of the 19th international conference on Architectural support for programming languages and operating systems
- Publisher
- ACM
- Published
- 2014-02-24
- Pages
- 269-284
- OpenAlex
- W2152839228
- Cited by
- 1,297
- References
- 6
- FWCI
- 73.02
- Type
- conference paper
- Language
- en
- Open access
- closed
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- Chen, T., Du, Z., Sun, N., Wang, J., Wu, C., Chen, Y., & Temam, O. (2014). DianNao: a small-footprint high-throughput accelerator for ubiquitous machine-learning. Proceedings of the 19th international conference on Architectural support for programming languages and operating systems. https://doi.org/10.1145/2541940.2541967
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Bibliographic data: Semantic Scholar, OpenAlex, Crossref.
Contains information from the Semantic Scholar Academic Graph Datasets, made available under the ODC Attribution License (ODC-BY 1.0).
Semantic Scholar’s data is described in: Kinney, R., et al. (2023). The Semantic Scholar Open Data Platform. arXiv:2301.10140.
