Xie, Yuan

Towards artificial general intelligence with hybrid Tianjic chip architecture

Pei, J., Deng, L., Song, S., Zhao, M., Zhang, Y., Wu, S., Wang, G., Zou, Z., Wu, Z., He, W., et al. (2019) · Nature

Advanced Memory and Neural ComputingPsychiatry, Mental Health, Neuroscience

Cited by 1,082

Model Compression and Hardware Acceleration for Neural Networks: A Comprehensive Survey

Deng, B. L., Li, G., Han, S., Shi, L., & Xie, Y. (2020) · Proceedings of the IEEE

Advanced Neural Network ApplicationsParallel Computing and Optimization Techniques

Cited by 996

Tackling the Qubit Mapping Problem for NISQ-Era Quantum Devices

Li, G., Ding, Y., & Xie, Y. (2019) · Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems

Quantum Computing Algorithms and ArchitectureParallel Computing and Optimization Techniques

Cited by 594

Overcoming the challenges of crossbar resistive memory architectures

Xu, C., Niu, D., Muralimanohar, N., Balasubramonian, R., Zhang, T., Yu, S., & Xie, Y. (2015) · 2015 IEEE 21st International Symposium on High Performance Computer Architecture (HPCA)

Advanced Memory and Neural ComputingParallel Computing and Optimization Techniques

Cited by 340

Stuck-at Fault Tolerance in RRAM Computing Systems

Xia, L., Huangfu, W., Tang, T., Yin, X., Chakrabarty, K., Xie, Y., Wang, Y., & Yang, H. (2018) · IEEE Journal on Emerging and Selected Topics in Circuits and Systems

Advanced Memory and Neural ComputingVLSI and Analog Circuit Testing

Cited by 177

$L1$ -Norm Batch Normalization for Efficient Training of Deep Neural Networks

Wu, S., Li, G., Deng, L., Liu, L., Wu, D., Xie, Y., & Shi, L. (2019) · IEEE Transactions on Neural Networks and Learning Systems

Advanced Neural Network ApplicationsNeural Networks and Applications

Cited by 166

Software-Hardware Codesign for Efficient Neural Network Acceleration

Guo, K., Han, S., Yao, S., Wang, Y., Xie, Y., & Yang, H. (2017) · IEEE Micro

Advanced Neural Network ApplicationsParallel Computing and Optimization Techniques

Cited by 78

MNSIM 2.0: A Behavior-Level Modeling Tool for Memristor-based Neuromorphic Computing Systems

Zhu, Z., Sun, H., Qiu, K., Xia, L., Krishnan, G., Dai, G., Niu, D., Chen, X., Hu, X. S., Cao, Y., et al. (2020) · Proceedings of the 2020 on Great Lakes Symposium on VLSI

Advanced Memory and Neural ComputingParallel Computing and Optimization Techniques

Cited by 77

A 16Mb dual-mode ReRAM macro with sub-14ns computing-in-memory and memory functions enabled by self-write termination scheme

Chen, W.-H., Lin, W.-J., Lai, L.-Y., Li, S., Hsu, C.-H., Lin, H.-T., Lee, H.-Y., Su, J.-W., Xie, Y., Sheu, S.-S., et al. (2017) · 2017 IEEE International Electron Devices Meeting (IEDM)

Advanced Memory and Neural ComputingFerroelectric and Negative Capacitance Devices

Cited by 73

A 462GOPs/J RRAM-based nonvolatile intelligent processor for energy harvesting IoE system featuring nonvolatile logics and processing-in-memory

Su, F., Chen, W.-H., Xia, L., Lo, C.-P., Tang, T., Wang, Z., Hsu, K.-H., Cheng, M., Li, J.-Y., Xie, Y., et al. (2017) · 2017 Symposium on VLSI Technology

Advanced Memory and Neural ComputingLow-power high-performance VLSI design

Cited by 69

On the Co-Design of Quantum Software and Hardware

Li, G., Wu, A., Shi, Y., Javadi-Abhari, A., Ding, Y., & Xie, Y. (2021) · Proceedings of the Eight Annual ACM International Conference on Nanoscale Computing and Communication

Quantum Computing Algorithms and ArchitectureParallel Computing and Optimization Techniques

Cited by 37

An Instruction Set Architecture for Machine Learning

Chen, Y., Lan, H., Du, Z., Liu, S., Tao, J., Han, D., Luo, T., Guo, Q., Li, L., Xie, Y., et al. (2018) · ACM Transactions on Computer Systems

Parallel Computing and Optimization TechniquesEmbedded Systems Design Techniques

Cited by 14