Spike-timing-dependent learning in memristive nanodevices
Abstract
The neuromorphic paradigm is attractive for nanoscale computation because of its massive parallelism, potential scalability, and inherent defect-, fault-, and failure-tolerance. We show how to implement timing-based learning laws, such as spike-timing-dependent plasticity (STDP), in simple, memristive nanodevices, such as those constructed from certain metal oxides. Such nano-scale ldquosynapsesrdquo can be combined with CMOS ldquoneuronsrdquo to create neuromorphic hardware several orders of magnitude denser than is possible in conventional CMOS. The key ideas are: (1) to factor out two synaptic state variables to pre- and post-synaptic neurons; and (2) to separate computational communication from learning by time-division multiplexing of pulse-width-modulated signals through synapses. This approach offers the advantages of: better control over power dissipation; fewer constraints on the design of memristive materials used for nanoscale synapses; learning dynamics can be dynamically turned on or off (e.g. by attentional priming mechanisms communicated extra-synaptically); greater control over the precise form and timing of the STDP equations; the ability to implement a variety of other learning laws besides STDP; better circuit diversity since the approach allows different learning laws to be implemented in different areas of a single chip using the same memristive material for all synapses.
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Memristors can be used to implement digital logic, synapses in neural applications, and hybrid circuits.
“They can also be used to implement digital logic [9], synapses in neural applications [10,11], and hybrid circuits [6,12].”
From Sub-nanosecond switching of a tantalum oxide memristor (2011) · cites this paper as [10]
Cites
Strukov, D. B., Snider, G. S., Stewart, D. R., & Williams, R. S. (2008) · Nature · doi:10.1038/nature06932 · Cited by 11,744 · see citing works
Self-citationMemristive devices and systems
Chua, L. O., & Kang, S. M. (1976) · Proceedings of the IEEE · doi:10.1109/proc.1976.10092 · Cited by 2,604 · see citing works
Synaptic Modification by Correlated Activity: Hebb's Postulate Revisited
Bi, G., & Poo, M. (2001) · Annual Review of Neuroscience · doi:10.1146/annurev.neuro.24.1.139 · Cited by 1,476 · see citing works
CMOL FPGA: a reconfigurable architecture for hybrid digital circuits with two-terminal nanodevices
Strukov, D. B., & Likharev, K. K. (2005) · Nanotechnology · doi:10.1088/0957-4484/16/6/045 · Cited by 506 · see citing works
Array-based architecture for FET-based, nanoscale electronics
DeHon, A. M. (2003) · IEEE Transactions on Nanotechnology · doi:10.1109/tnano.2003.808508 · Cited by 377 · see citing works
Nano/CMOS architectures using a field-programmable nanowire interconnect
Snider, G. S., & Williams, R. S. (2007) · Nanotechnology · doi:10.1088/0957-4484/18/3/035204 · Cited by 364 · see citing works
Self-citationMolecule-Independent Electrical Switching in Pt/Organic Monolayer/Ti Devices
Stewart, D. R., Ohlberg, D. A. A., Beck, P. A., Chen, Y., Williams, R. S., Jeppesen, J. O., Nielsen, K. A., & Stoddart, J. F. (2003) · Nano Letters · doi:10.1021/nl034795u · Cited by 358 · see citing works
Error detecting codes, self-checking circuits and applications
Wakerly, J. F. (1978) · Cited by 345 · see citing works
Molecular electronics: from devices and interconnect to circuits and architecture
Stan, M. R., Franzon, P. D., Goldstein, S. C., Lach, J., & Ziegler, M. M. (2003) · Proceedings of the IEEE · doi:10.1109/jproc.2003.818327 · Cited by 278 · see citing works
Self-organized computation with unreliable, memristive nanodevices
Snider, G. S. (2007) · Nanotechnology · doi:10.1088/0957-4484/18/36/365202 · Cited by 264 · see citing works
Self-citationNonlinear circuit foundations for nanodevices, part I: the four-element torus
Chua, L. O. (2003) · Proceedings of the IEEE · doi:10.1109/jproc.2003.818319 · Cited by 263 · see citing works
Reliable Computation in the Presence of Noise
Hamming, R. W., Winograd, S., & Cowan, J. D. (1964) · Mathematics of Computation · doi:10.2307/2003803 · Cited by 256 · see citing works
Limits on the memory storage capacity of bounded synapses
Fusi, S., & Abbott, L. F. (2007) · Nature Neuroscience · doi:10.1038/nn1859 · Cited by 224 · see citing works
CMOS-like logic in defective, nanoscale crossbars
Snider, G. S., Kuekes, P. J., & Williams, R. S. (2004) · Nanotechnology · doi:10.1088/0957-4484/15/8/003 · Cited by 192 · see citing works
Self-citationDistributed ARTMAP: a neural network for fast distributed supervised learning
Carpenter, G. A., Milenova, B. L., & Noeske, B. W. (1998) · Neural Networks · doi:10.1016/s0893-6080(98)00019-7 · Cited by 150 · see citing works
Defect‐tolerant nanoelectronic pattern classifiers
Lee, J. H., & Likharev, K. K. (2007) · International Journal of Circuit Theory and Applications · doi:10.1002/cta.410 · Cited by 53 · see citing works
Coding Approaches to Fault Tolerance in Combinational and Dynamic Systems
Hadjicostis, C. N. (2002) · Springer eBooks · doi:10.1007/978-1-4615-0853-3 · Cited by 41 · see citing works
Global Reinforcement Learning in Neural Networks
Ma, X., & Likharev, K. K. (2007) · IEEE Transactions on Neural Networks · doi:10.1109/tnn.2006.888376 · Cited by 29 · see citing works
A novel highly reliable low-power nano architecture when von Neumann augments Kolmogorov
Beiu, V. C. (2004) · Application-Specific Systems, Architectures, and Processors · doi:10.1109/asap.2004.4 · Cited by 25 · see citing works
A novel highly reliable low-power nano architecture when von neumann augments kolmogorov
Beiu, V. C. (2004) · IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) · doi:10.1109/asap.2004.1342467 · Cited by 21 · see citing works
Fault-tolerant sub-lithographic design with rollback recovery
Naeimi, H., & DeHon, A. M. (2008) · Nanotechnology · doi:10.1088/0957-4484/19/11/115708 · Cited by 14 · see citing works
Can large fanin circuits perform reliable computations in the presence of noise?
Reischuk, R. (1997) · Lecture notes in computer science · doi:10.1007/bfb0045074 · Cited by 4 · see citing works
Flagged first, then by citations
Cited by
Sorted by citations
Nanoscale Memristor Device as Synapse in Neuromorphic Systems
Jo, S. H., Chang, T., Ebong, I., Bhadviya, B. B., Mazumder, P., & Lu, W. (2010) · Nano Letters · doi:10.1021/nl904092h · Cited by 4,174 · see citing works
Wong, H.-S. P., Lee, H.-Y., Yu, S., Chen, Y.-S., Wu, Y., Chen, P.-S., Lee, B., Chen, F. T., & Tsai, M.-J. (2012) · Proceedings of the IEEE · doi:10.1109/jproc.2012.2190369 · Cited by 2,757 · see citing works
Towards spike-based machine intelligence with neuromorphic computing
Roy, K., Jaiswal, A., & Panda, P. (2019) · Nature · doi:10.1038/s41586-019-1677-2 · Cited by 2,267 · see citing works
Synaptic electronics: materials, devices and applications
Kuzum, D., Yu, S., & Wong, H. ‐. P. (2013) · Nanotechnology · doi:10.1088/0957-4484/24/38/382001 · Cited by 1,257 · see citing works
Short-Term Memory to Long-Term Memory Transition in a Nanoscale Memristor
Chang, T., Jo, S.-H., & Lu, W. (2011) · ACS Nano · doi:10.1021/nn202983n · Cited by 1,062 · see citing works
Kim, K.-H., Gaba, S., Wheeler, D., Cruz-Albrecht, J. M., Hussain, T., Srinivasa, N., & Lu, W. (2012) · Nano Letters · doi:10.1021/nl203687n · Cited by 924 · see citing works
The mechanism of electroforming of metal oxide memristive switches
Yang, J. J., Miao, F., Pickett, M. D., Ohlberg, D. A. A., Stewart, D. R., Lau, C. N., & Williams, R. S. (2009) · Nanotechnology · doi:10.1088/0957-4484/20/21/215201 · Cited by 860 · see citing works
Yu, S., Wu, Y., Jeyasingh, R., Kuzum, D., & Wong, H.-S. P. (2011) · IEEE Transactions on Electron Devices · doi:10.1109/ted.2011.2147791 · Cited by 805 · see citing works
Wang, Z., Xu, H. Y., Li, X., Yu, H., Liu, Y., & Zhu, X. J. (2012) · Advanced Functional Materials · doi:10.1002/adfm.201103148 · Cited by 816 · see citing works
Sub-nanosecond switching of a tantalum oxide memristor
Torrezan, A. C., Strachan, J. P., Medeiros-Ribeiro, G., & Williams, R. S. (2011) · Nanotechnology · doi:10.1088/0957-4484/22/48/485203 · Cited by 701 · see citing works
If it's pinched it's a memristor
Chua, L. (2014) · Semiconductor Science and Technology · doi:10.1088/0268-1242/29/10/104001 · Cited by 685 · see citing works
Practical Approach to Programmable Analog Circuits With Memristors
Pershin, Y. V., & Di Ventra, M. (2010) · IEEE Transactions on Circuits and Systems I: Regular Papers · doi:10.1109/tcsi.2009.2038539 · Cited by 639 · see citing works
Integration of nanoscale memristor synapses in neuromorphic computing architectures
Indiveri, G., Linares-Barranco, B., Legenstein, R. A., Deligeorgis, G., & Prodromakis, T. (2013) · Nanotechnology · doi:10.1088/0957-4484/24/38/384010 · Cited by 608 · see citing works
On Spike-Timing-Dependent-Plasticity, Memristive Devices, and Building a Self-Learning Visual Cortex
Zamarreño-Ramos, C., Camuñas-Mesa, L. A., Pérez‐Carrasco, J. A., Masquelier, T., Serrano‐Gotarredona, T., & Linares-Barranco, B. (2011) · Frontiers in Neuroscience · doi:10.3389/fnins.2011.00026 · Cited by 558 · see citing works
A correlated nickelate synaptic transistor
Shi, J. Z., Ha, S. D., Zhou, Y., Schoofs, F., & Ramanathan, S. (2013) · Nature Communications · doi:10.1038/ncomms3676 · Cited by 544 · see citing works
STDP and STDP variations with memristors for spiking neuromorphic learning systems
Serrano‐Gotarredona, T., Masquelier, T., Prodromakis, T., Indiveri, G., & Linares-Barranco, B. (2013) · Frontiers in Neuroscience · doi:10.3389/fnins.2013.00002 · Cited by 531 · see citing works
The Future of Memristors: Materials Engineering and Neural Networks
Sun, K., Chen, J., & Yan, X. (2020) · Advanced Functional Materials · doi:10.1002/adfm.202006773 · Cited by 486 · see citing works
Memristor-based neural networks
Thomas, A. (2013) · Journal of Physics D: Applied Physics · doi:10.1088/0022-3727/46/9/093001 · Cited by 471 · see citing works
Ultrafast Synaptic Events in a Chalcogenide Memristor
Li, Y., Zhong, Y., Xu, L., Zhang, J., Xu, X., Sun, H., & Miao, X. (2013) · Scientific Reports · doi:10.1038/srep01619 · Cited by 423 · see citing works
Immunity to Device Variations in a Spiking Neural Network With Memristive Nanodevices
Querlioz, D., Bichler, O., Dollfus, P., & Gamrat, C. (2013) · IEEE Transactions on Nanotechnology · doi:10.1109/tnano.2013.2250995 · Cited by 420 · see citing works
An Organic Nanoparticle Transistor Behaving as a Biological Spiking Synapse
Alibart, F., Pleutin, S., Guérin, D., Novembre, C., Lenfant, S., Lmimouni, K., Gamrat, C., & Vuillaume, D. (2009) · Advanced Functional Materials · doi:10.1002/adfm.200901335 · Cited by 377 · see citing works
Spin-Transfer Torque Magnetic Memory as a Stochastic Memristive Synapse for Neuromorphic Systems
Vincent, A. F., Larroque, J., Locatelli, N., Ben Romdhane, N., Bichler, O., Gamrat, C., Zhao, W. S., Klein, J.-O., Galdin-Retailleau, S., & Querlioz, D. (2015) · IEEE Transactions on Biomedical Circuits and Systems · doi:10.1109/tbcas.2015.2414423 · Cited by 360 · see citing works
Serb, A., Bill, J., Khiat, A., Berdan, R., Legenstein, R. A., & Prodromakis, T. (2016) · Nature Communications · doi:10.1038/ncomms12611 · Cited by 333 · see citing works
Dynamical Properties and Design Analysis for Nonvolatile Memristor Memories
Ho, Y., Huang, G. M., & Li, P. (2010) · IEEE Transactions on Circuits and Systems I Regular Papers · doi:10.1109/tcsi.2010.2078710 · Cited by 331 · see citing works
Ielmini, D., & Ambrogio, S. (2019) · Nanotechnology · doi:10.1088/1361-6528/ab554b · Cited by 273 · see citing works
Towards Oxide Electronics: a Roadmap
Coll, M., Fontcuberta, J., Althammer, M., Bibès, M., Boschker, H., Calleja, A., Cheng, G., Cuoco, M., Dittmann, R., Dkhil, B., et al. (2019) · Applied Surface Science · doi:10.1016/j.apsusc.2019.03.312 · Cited by 315 · see citing works
Seo, K., Kim, I., Jung, S., Jo, M., Park, S., Park, J., Shin, J., Biju, K. P., Kong, J., Lee, K., et al. (2011) · Nanotechnology · doi:10.1088/0957-4484/22/25/254023 · Cited by 286 · see citing works
Chua, L. O. (2012) · Proceedings of the IEEE · doi:10.1109/jproc.2012.2190814 · Cited by 284 · see citing works
Graphene Dynamic Synapse with Modulatable Plasticity
Tian, H., Mi, W., Wang, X., Zhao, H., Xie, Q., Li, C., Li, Y., Yang, Y., & Ren, T. (2015) · Nano Letters · doi:10.1021/acs.nanolett.5b03283 · Cited by 279 · see citing works
A hybrid nanomemristor/transistor logic circuit capable of self-programming
Borghetti, J., Li, Z., Straznicky, J., Li, X., Ohlberg, D. A. A., Wu, W., Stewart, D. R., & Williams, R. S. (2009) · Proceedings of the National Academy of Sciences · doi:10.1073/pnas.0806642106 · Cited by 270 · see citing works
Plasticity in memristive devices for spiking neural networks
Saïghi, S., Mayr, C., Serrano‐Gotarredona, T., Schmidt, H., Lecerf, G., Tomas, J., Grollier, J., Boyn, S., Vincent, A. F., Querlioz, D., et al. (2015) · Frontiers in Neuroscience · doi:10.3389/fnins.2015.00051 · Cited by 236 · see citing works
Bio-Inspired Stochastic Computing Using Binary CBRAM Synapses
Suri, M., Querlioz, D., Bichler, O., Palma, G., Vianello, E., Vuillaume, D., Gamrat, C., & DeSalvo, B. (2013) · IEEE Transactions on Electron Devices · doi:10.1109/ted.2013.2263000 · Cited by 229 · see citing works
Nanoionics‐Enabled Memristive Devices: Strategies and Materials for Neuromorphic Applications
Wang, Z., Wang, L., Nagai, M., Xie, L., Yi, M., & Huang, W. (2017) · Advanced Electronic Materials · doi:10.1002/aelm.201600510 · Cited by 221 · see citing works
Visual Pattern Extraction Using Energy-Efficient “2-PCM Synapse” Neuromorphic Architecture
Bichler, O., Suri, M., Querlioz, D., Vuillaume, D., de Salvo, B., & Gamrat, C. (2012) · IEEE Transactions on Electron Devices · doi:10.1109/ted.2012.2197951 · Cited by 213 · see citing works
Self-Adaptive Spike-Time-Dependent Plasticity of Metal-Oxide Memristors
Prezioso, M., Bayat, F. M., Hoskins, B. D., Likharev, K. K., & Strukov, D. B. (2016) · Scientific Reports · doi:10.1038/srep21331 · Cited by 212 · see citing works
Nishitani, Y., Kaneko, Y., Ueda, M., Morie, T., & Fujii, E. (2012) · Journal of Applied Physics · doi:10.1063/1.4729915 · Cited by 211 · see citing works
Simulation of a memristor-based spiking neural network immune to device variations
Querlioz, D., Bichler, O., & Gamrat, C. (2011) · International Joint Conference on Neural Networks (IJCNN) · doi:10.1109/ijcnn.2011.6033439 · Cited by 203 · see citing works
Memristors: Devices, Models, and Applications [Scanning the Issue]
Mazumder, P., Kang, S. M., & Waser, R. M. (2012) · Proceedings of the IEEE · doi:10.1109/jproc.2012.2190812 · Cited by 201 · see citing works
Implementing p-bits With Embedded MTJ
Camsari, K. Y., Salahuddin, S., & Datta, S. (2017) · IEEE Electron Device Letters · doi:10.1109/led.2017.2768321 · Cited by 198 · see citing works
Emerging non-volatile memories
Xue, C. J., Zhang, Y., Chen, Y., Sun, G., Yang, J. J., & Li, H. H. (2011) · International Conference on Hardware/Software Codesign and System Synthesis · doi:10.1145/2039370.2039420 · Cited by 197 · see citing works
CMOS and Memristor-Based Neural Network Design for Position Detection
Ebong, I. E., & Mazumder, P. (2011) · Proceedings of the IEEE · doi:10.1109/jproc.2011.2173089 · Cited by 189 · see citing works
A Memristive Nanoparticle/Organic Hybrid Synapstor for Neuroinspired Computing
Alibart, F., Pleutin, S., Bichler, O., Gamrat, C., Serrano‐Gotarredona, T., Linares‐Barranco, B., & Vuillaume, D. (2011) · Advanced Functional Materials · doi:10.1002/adfm.201101935 · Cited by 201 · see citing works
A memristive nanoparticle/organic hybrid synapstor for neuro-inspired computing.
Alibart, F., Pleutin, S., Bichler, O., Gamrat, C., Serrano Gotarredona, M. T., Linares Barranco, B., & Vuillaume, D. (2011) · LA Referencia (Red Federada de Repositorios Institucionales de Publicaciones Científicas) · Cited by 185 · see citing works
Xin, W., Saxena, V., Zhu, K., & Balagopal, S. (2015) · IEEE Transactions on Circuits & Systems II Express Briefs · doi:10.1109/tcsii.2015.2456372 · Cited by 173 · see citing works
A Circuit-Based Learning Architecture for Multilayer Neural Networks With Memristor Bridge Synapses
Adhikari, S. P., Kim, H., Budhathoki, R. K., Yang, C., & Chua, L. O. (2014) · IEEE Transactions on Circuits and Systems I Regular Papers · doi:10.1109/tcsi.2014.2359717 · Cited by 171 · see citing works
Memristor: A New Concept in Synchronization of Coupled Neuromorphic C ircuits
VOLOS, C. K., Kyprianidis, I. M., Stouboulos, I. N., Cuautle, E. T. , & Vaidyanathan, S. V. (2015) · Journal of Engineering Science and Technology Review · doi:10.25103/jestr.082.21 · Cited by 171 · see citing works
A Boundary Condition-Based Approach to the Modeling of Memristor Nanostructures
Corinto, F., & Ascoli, A. (2012) · IEEE Transactions on Circuits and Systems I Regular Papers · doi:10.1109/tcsi.2012.2190563 · Cited by 164 · see citing works
Specifications of Nanoscale Devices and Circuits for Neuromorphic Computational Systems
Rajendran, B., Liu, Y., Seo, J.-S., Gopalakrishnan, K., Chang, L., Friedman, D. J., & Ritter, M. B. (2012) · IEEE Transactions on Electron Devices · doi:10.1109/ted.2012.2227969 · Cited by 158 · see citing works
A Hybrid CMOS-Memristor Neuromorphic Synapse
Azghadi, M. R., Linares-Barranco, B., Abbott, D., & Leong, P. H. W. (2016) · IEEE Transactions on Biomedical Circuits and Systems · doi:10.1109/tbcas.2016.2618351 · Cited by 155 · see citing works
An electrically modifiable synapse array of resistive switching memory
Choi, H., Jung, H., Lee, J., Yoon, J., Park, J., Seong, D.-J., Lee, W., Hasan, M., Jung, G. Y., & Hwang, H. (2009) · Nanotechnology · doi:10.1088/0957-4484/20/34/345201 · Cited by 147 · see citing works
Physical aspects of low power synapses based on phase change memory devices
Suri, M., Bichler, O., Querlioz, D., Traoré, B., Cueto, O., Perniola, L., Sousa, V., Vuillaume, D., Gamrat, C., & de Salvo, B. (2012) · Journal of Applied Physics · doi:10.1063/1.4749411 · Cited by 142 · see citing works
Bioinspired Programming of Memory Devices for Implementing an Inference Engine
Querlioz, D., Bichler, O., Vincent, A. F., & Gamrat, C. (2015) · Proceedings of the IEEE · doi:10.1109/jproc.2015.2437616 · Cited by 138 · see citing works
Memristor emulator with tunable characteristic and its experimental results
Babacan, Y., Yeşil, A., & Kaçar, F. (2017) · AEU - International Journal of Electronics and Communications · doi:10.1016/j.aeue.2017.07.012 · Cited by 137 · see citing works
Neuromorphic Computing Based on Emerging Memory Technologies
Rajendran, B., & Alibart, F. (2016) · IEEE Journal on Emerging and Selected Topics in Circuits and Systems · doi:10.1109/jetcas.2016.2533298 · Cited by 135 · see citing works
A spiking neuromorphic design with resistive crossbar
Liu, C., Yan, B., Yang, C., Song, L., Li, Z., Liu, B., Chen, Y., Li, H. H., Wu, Q., & Jiang, H. (2015) · ACM/IEEE Design Automation Conference (DAC) · doi:10.1145/2744769.2744783 · Cited by 131 · see citing works
Neuromorphic Spiking Neural Networks and Their Memristor-CMOS Hardware Implementations
Camuñas-Mesa, L. A., Linares-Barranco, B., & Serrano‐Gotarredona, T. (2019) · Materials · doi:10.3390/ma12172745 · Cited by 129 · see citing works
Abbas, Y., Jeon, Y., Sokolov, A. S., Kim, S., Ku, B., & Choi, C. (2018) · Scientific Reports · doi:10.1038/s41598-018-19575-9 · Cited by 127 · see citing works
Neural Learning Circuits Utilizing Nano-Crystalline Silicon Transistors and Memristors
Cantley, K. D., Subramaniam, A., Stiegler, H. J., Chapman, R. A., & Vogel, E. M. (2012) · IEEE Transactions on Neural Networks and Learning Systems · doi:10.1109/tnnls.2012.2184801 · Cited by 121 · see citing works
Leveraging Memristive Systems in the Construction of Digital Logic Circuits
Rose, G. S., Rajendran, J., Manem, H., Karri, R., & Pino, R. E. (2011) · Proceedings of the IEEE · doi:10.1109/jproc.2011.2167489 · Cited by 120 · see citing works
Silver chalcogenide based memristor devices
Oblea, A. S., Timilsina, A., Moore, D., & Campbell, K. A. (2010) · International Joint Conference on Neural Networks (IJCNN) · doi:10.1109/ijcnn.2010.5596775 · Cited by 118 · see citing works
CrossNets: Neuromorphic Hybrid CMOS/Nanoelectronic Networks
Likharev, K. K. (2011) · Science of Advanced Materials · doi:10.1166/sam.2011.1177 · Cited by 115 · see citing works
A Compact Memristor-Based Dynamic Synapse for Spiking Neural Networks
Hu, M., Chen, Y., Yang, J. J., Wang, Y., & Li, H. H. (2016) · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · doi:10.1109/tcad.2016.2618866 · Cited by 115 · see citing works
General memristor with applications in multilayer neural networks
Wen, S.-P., Xie, X., Yan, Z., Huang, T.-W., & Zeng, Z.-G. (2018) · Neural Networks · doi:10.1016/j.neunet.2018.03.015 · Cited by 103 · see citing works
Building Neuromorphic Circuits with Memristive Devices
Chang, T., Yang, Y., & Lu, W. D. (2013) · IEEE Circuits and Systems Magazine · doi:10.1109/mcas.2013.2256260 · Cited by 107 · see citing works
A compound memristive synapse model for statistical learning through STDP in spiking neural networks
Bill, J., & Legenstein, R. A. (2014) · Frontiers in Neuroscience · doi:10.3389/fnins.2014.00412 · Cited by 104 · see citing works
Material Memristive Device Circuits with Synaptic Plasticity: Learning and Memory
Erokhin, V. V., Berzina, T., Camorani, P., Smerieri, A., Vavoulis, D. V., Feng, J., & Fontana, M. P. (2011) · BioNanoScience · doi:10.1007/s12668-011-0004-7 · Cited by 102 · see citing works
Spike-timing dependent plasticity in a transistor-selected resistive switching memory
Ambrogio, S., Balatti, S., Nardi, F., Facchinetti, S., & Ielmini, D. (2013) · Nanotechnology · doi:10.1088/0957-4484/24/38/384012 · Cited by 101 · see citing works
Afifi, A., Ayatollahi, A., & Raissi, F. (2009) · European Conference on Circuit Theory and Design · doi:10.1109/ecctd.2009.5275035 · Cited by 99 · see citing works
Synaptic electronics and neuromorphic computing
Upadhyay, N. K., Joshi, S., & Yang, J. J. (2016) · Science China Information Sciences · doi:10.1007/s11432-016-5565-1 · Cited by 97 · see citing works
Wang, Z., Ambrogio, S., Balatti, S., & Ielmini, D. (2015) · Frontiers in Neuroscience · doi:10.3389/fnins.2014.00438 · Cited by 93 · see citing works
An Energy-Efficient Memristive Threshold Logic Circuit
Rajendran, J., Manem, H., Karri, R., & Rose, G. S. (2012) · IEEE Transactions on Computers · doi:10.1109/tc.2011.26 · Cited by 92 · see citing works
Nanotube devices based crossbar architecture: toward neuromorphic computing
Zhao, W. S., Agnus, G., Derycke, V., Filoramo, A., Bourgoin, J. ‐., & Gamrat, C. (2010) · Nanotechnology · doi:10.1088/0957-4484/21/17/175202 · Cited by 89 · see citing works
Low-Power Resistive Switching Characteristic in HfO2/TiOx Bi-Layer Resistive Random-Access Memory
Ding, X., Feng, Y., Huang, P. C., Liu, L., & Kang, J. (2019) · Nanoscale Research Letters · doi:10.1186/s11671-019-2956-4 · Cited by 88 · see citing works
A memristor SPICE model for designing memristor circuits
Mahvash, M., & Parker, A. C. (2010) · IEEE International Midwest Symposium on Circuits and Systems (MWSCAS) · doi:10.1109/mwscas.2010.5548803 · Cited by 87 · see citing works
Memristor emulator with spike-timing-dependent-plasticity
Babacan, Y., & Kaçar, F. (2016) · AEU - International Journal of Electronics and Communications · doi:10.1016/j.aeue.2016.12.025 · Cited by 84 · see citing works
A scalable neural chip with synaptic electronics using CMOS integrated memristors
Cruz-Albrecht, J., Derosier, T., & Srinivasa, N. (2013) · Nanotechnology · doi:10.1088/0957-4484/24/38/384011 · Cited by 83 · see citing works
Low-Energy Robust Neuromorphic Computation Using Synaptic Devices
Kuzum, D., Jeyasingh, R. G. D., Yu, S., & Wong, H. ‐. P. (2012) · IEEE Transactions on Electron Devices · doi:10.1109/ted.2012.2217146 · Cited by 80 · see citing works
Robust neural logic block (NLB) based on memristor crossbar array
Chabi, D., Zhao, W. S., Querlioz, D., & Klein, J. (2011) · IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH) · doi:10.1109/nanoarch.2011.5941495 · Cited by 79 · see citing works
Observation of two resistance switching modes in TiO2memristive devices electroformed at low current
Miao, F., Yang, J. J., Borghetti, J. L., Medeiros‐Ribeiro, G., & Williams, R. S. (2011) · Nanotechnology · doi:10.1088/0957-4484/22/25/254007 · Cited by 77 · see citing works
Memristive devices in computing system
Yang, J. J., & Williams, R. S. (2013) · ACM Journal on Emerging Technologies in Computing Systems · doi:10.1145/2463585.2463587 · Cited by 78 · see citing works
Memristor PUFs: a new generation of memory-based physically unclonable functions
Koeberl, P., Koçabas, Ü., & Sadeghi, A. (2013) · Design, Automation, and Test in Europe · doi:10.5555/2485288.2485390 · Cited by 76 · see citing works
Kim, Y., Zhang, Y., & Li, P. (2015) · ACM Journal on Emerging Technologies in Computing Systems · doi:10.1145/2700234 · Cited by 74 · see citing works
If It’s Pinched It’s a Memristor
Chua, L. O. (2013) · Springer eBooks · doi:10.1007/978-1-4614-9068-5_2 · Cited by 70 · see citing works
On neuromorphic spiking architectures for asynchronous STDP memristive systems
Pérez‐Carrasco, J. A., Zamarreño-Ramos, C., Serrano‐Gotarredona, T., & Linares-Barranco, B. (2010) · IEEE International Symposium on Circuits and Systems proceedings · doi:10.1109/iscas.2010.5537484 · Cited by 70 · see citing works
Dopant Control by Atomic Layer Deposition in Oxide Films for Memristive Switches
Yang, J. J., Kobayashi, N. P., Strachan, J. P., Zhang, M.-X., Ohlberg, D. A. A., Pickett, M. D., Li, Z., Medeiros‐Ribeiro, G., & Williams, R. S. (2010) · Chemistry of Materials · doi:10.1021/cm1020959 · Cited by 70 · see citing works
Evolution of Plastic Learning in Spiking Networks via Memristive Connections
Howard, G., Gale, E., Bull, L., Costello, B. D. L., & Adamatzky, A. (2012) · IEEE Transactions on Evolutionary Computation · doi:10.1109/tevc.2011.2170199 · Cited by 69 · see citing works
A digital neuromorphic VLSI architecture with memristor crossbar synaptic array for machine learning
Kim, Y., Zhang, Y., & Li, P. (2012) · IEEE International SOC Conference (SOCC) · doi:10.1109/socc.2012.6398336 · Cited by 69 · see citing works
A Proposal for Hybrid Memristor-CMOS Spiking Neuromorphic Learning Systems
Serrano‐Gotarredona, T., Prodromakis, T., & Linares-Barranco, B. (2013) · IEEE Circuits and Systems Magazine · doi:10.1109/mcas.2013.2256271 · Cited by 69 · see citing works
Broccard, F. D., Joshi, S., Wang, J., & Cauwenberghs, G. (2017) · Journal of Neural Engineering · doi:10.1088/1741-2552/aa67a9 · Cited by 68 · see citing works
Imitating the brain with neurocomputer a “new” way towards artificial general intelligence
Huang, T. (2017) · Machine Intelligence Research · doi:10.1007/s11633-017-1082-y · Cited by 65 · see citing works
Exploiting memristance in adaptive asynchronous spiking neuromorphic nanotechnology systems
Linares-Barranco, B., & Serrano‐Gotarredona, T. (2009) · DIGITAL.CSIC (Spanish National Research Council (CSIC)) · Cited by 60 · see citing works
Materials, technologies, and circuit concepts for nanocrossbar-based bipolar RRAM
Kügeler, C., Rosezin, R., Linn, E., Bruchhaus, R., & Waser, R. M. (2011) · Applied Physics A · doi:10.1007/s00339-011-6287-2 · Cited by 60 · see citing works
Compact Model of HfOX-Based Electronic Synaptic Devices for Neuromorphic Computing
Huang, P. C., Zhu, D., Chen, S., Zhou, Z., Chen, Z., Gao, B., Liu, L., Liu, X., & Kang, J. (2017) · IEEE Transactions on Electron Devices · doi:10.1109/ted.2016.2643162 · Cited by 57 · see citing works
Modeling for multilevel switching in oxide-based bipolar resistive memory
Hur, J., Kim, K. M., Chang, M., Lee, S. R., Lee, D., Lee, C. B., Lee, M., Kim, Y.-B., Kim, C., & Chung, U. (2012) · Nanotechnology · doi:10.1088/0957-4484/23/22/225702 · Cited by 57 · see citing works
Learning with memristive devices: How should we model their behavior?
Querlioz, D., Dollfus, P., Bichler, O., & Gamrat, C. (2011) · IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH) · doi:10.1109/nanoarch.2011.5941497 · Cited by 57 · see citing works
Isah, A., & Bilbault, J. (2022) · Journal of Low Power Electronics and Applications · doi:10.3390/jlpea12030044 · Cited by 57 · see citing works
AHaH Computing–From Metastable Switches to Attractors to Machine Learning
Nugent, M. A., & Molter, T. W. (2014) · PLoS ONE · doi:10.1371/journal.pone.0085175 · Cited by 55 · see citing works
Giant nonvolatile resistive switching in a Mott oxide and ferroelectric hybrid
Salev, P., del Valle, J., Kalcheim, Y., & Schuller, I. K. (2019) · Proceedings of the National Academy of Sciences · doi:10.1073/pnas.1822138116 · Cited by 54 · see citing works
Recent advances in neuromorphic transistors for artificial perception applications
Wang, W. S., & Zhu, L. Q. (2022) · Science and Technology of Advanced Materials · doi:10.1080/14686996.2022.2152290 · Cited by 54 · see citing works
Associate learning and correcting in a memristive neural network
Chen, L., Li, C., Wang, X., & Duan, S. (2012) · Neural Computing and Applications · doi:10.1007/s00521-012-0868-7 · Cited by 54 · see citing works
- Authors
- Snider, G. S.
- Affiliations
- Hewlett-Packard (United States) (US)
- Corresponding author
- Snider, Greg S.
- Venue
- 2008 IEEE International Symposium on Nanoscale Architectures
- Publisher
- IEEE
- Published
- 2008-06
- Pages
- 85-92
- OpenAlex
- W2101834447
- Cited by
- 341
- References
- 22
- Citations by year
- 2026: 4 · 2025: 3 · 2024: 8 · 2023: 9 · 2022: 12 · 2021: 11 · 2020: 12 · 2019: 19 · 2018: 14 · 2017: 24 · 2016: 17 · 2015: 30 · 2014: 24 · 2013: 46 · 2012: 43
- FWCI
- 30.31
- Type
- conference paper
- Language
- en
- Open access
- closed
- Locations
- IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH) (publishedVersion)
- Topics
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Advanced Memory and Neural Computing
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Ferroelectric and Negative Capacitance Devices
- Life Sciences › Biochemistry, Genetics and Molecular Biology › Molecular Biology › DNA and Biological Computing
- Keywords
- spike-timing-dependent plasticity, neuromorphic hardware, time-division multiplexing, pulse width modulation, power dissipation, learning law, attentional priming, fault-tolerant computing
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