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Cited by 207Advanced Memory and Neural ComputingFerroelectric and Negative Capacitance DevicesNeural Networks and Applications

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Energy-efficient memcapacitor devices for neuromorphic computing

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Demasius, Kai-Uwe, Kirschen, Aron, Parkin, Stuart·2021·Nature Electronics
DOI 10.1038/s41928-021-00649-y
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Abstract

Data-intensive computing operations, such as training neural networks, are essential for applications in artificial intelligence but are energy intensive. One solution is to develop specialized hardware onto which neural networks can be directly mapped, and arrays of memristive devices can, for example, be trained to enable parallel multiply–accumulate operations. Here we show that memcapacitive devices that exploit the principle of charge shielding can offer a highly energy-efficient approach for implementing parallel multiply–accumulate operations. We fabricate a crossbar array of 156 microscale memcapacitor devices and use it to train a neural network that could distinguish the letters ‘M’, ‘P’ and ‘I’. Modelling these arrays suggests that this approach could offer an energy efficiency of 29,600 tera-operations per second per watt, while ensuring high precision (6–8 bits). Simulations also show that the devices could potentially be scaled down to a lateral size of around 45 nm.

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  • The Si memcapacitive device is scalable down to around 45 nm and its crossbar array architecture supports integration into compact and energy-efficient neuromorphic systems.

    “The device's scalability down to around 45 nm and its crossbar array architecture further support its integration into compact and energy-efficient neuromorphic systems.”

    From Framework for In-Memory Computing Based on Memristor and Memcapacitor for On-Chip Training (2023) · cites this paper as [2]

  • The Si memcapacitive device has a high dynamic range, enabling precise analog signal processing, and low power operation through adiabatic charging.

    “Notable features include a high dynamic range, which enables precise analog signal processing, and low power operation through adiabatic charging, enhancing energy efficiency.”

    From Framework for In-Memory Computing Based on Memristor and Memcapacitor for On-Chip Training (2023) · cites this paper as [2]

  • The Si memcapacitive device's dynamic range, low power operation, scalability, and crossbar array structure position it as a promising choice for energy-efficient neuromorphic computing systems.

    “Overall, the Si memcapacitive device's dynamic range, low power operation, scalability, and crossbar array structure position it as a promising choice for energy-efficient neuromorphic computing systems [2].”

    From Framework for In-Memory Computing Based on Memristor and Memcapacitor for On-Chip Training (2023) · cites this paper as [2]

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References 46 · Cited by 207

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Metadata

Authors
Demasius, K.-U., Kirschen, A., & Parkin, S.
Affiliations
Max Planck Institute of Microstructure Physics (DE)
Corresponding author
  • Demasius, Kai-Uwe
  • Kirschen, Aron
  • Parkin, Stuart
ORCID
Venue
Nature Electronics
Publisher
Springer Science and Business Media LLC
Published
2021-10-11
Volume
4
Issue
10
Pages
748-756
ISSN
2520-1131 (ISSN-L)
DOI
10.1038/s41928-021-00649-y
OpenAlex
W3207111975
Cited by
207
References
46
Citations by year
2026: 36 · 2025: 62 · 2024: 49 · 2023: 44 · 2022: 16
FWCI
8.02
Type
journal article
Language
en
Open access
Licence
Locations
Nature Electronics (publishedVersion, cc-by)
Funders
  • Technische Universität Dresden
  • Max-Planck-Gesellschaft
Topics
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › Advanced Memory and Neural Computing
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › Ferroelectric and Negative Capacitance Devices
  • Physical Sciences › Computer Science › Artificial Intelligence › Neural Networks and Applications
Keywords
memcapacitor, neuromorphic computing, energy efficiency, charge shielding, crossbar arrays, multiply-accumulate operations, neural network training, memristive hardware, device scaling, letter classification

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