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Cited by 197

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Novel large area joining technique for improved power device performance

Schwarzbauer, H., Kuhnert, R.·1991·IEEE Transactions on Industry Applications

Abstract

Conventional techniques of joining silicon wafers to suitable substrates do not satisfy the demands of future power devices. Therefore, a low-temperature joining technique based on the principle of diffusion welding has been developed. The surfaces to be joined have to be metalized with Ag or Au. The molybdenum substrate is coated with a thin layer of silver flakes. Thereafter, the parts to be joined are sintered together at about 240 degrees C and a pressure of approximately 40 N/mm/sup 2/ for a few minutes. The joining technique does not affect the silicon wafer, and accordingly, is compatible with conventional power device and IC fabrication techniques. Both sides of the wafer can be joined with substrates even if IC structures are present. This possibility allows an increased surge current. Numerical calculations for different wafer thicknesses have been performed and compared with test devices. The technical usefulness has been proved by additional tests such as thermal cycling.>

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Metadata

Authors
Schwarzbauer, H., & Kuhnert, R.
Venue
IEEE Transactions on Industry Applications
Published
1991
Volume
27
Issue
1
Pages
93-95
ISSN
0093-9994 (ISSN-L)
OpenAlex
W2134357750
Cited by
197
References
0
FWCI
2.31
Type
journal article
Language
en
Open access
closed

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CoChat. (2026). Citation check: Novel large area joining technique for improved power device performance. https://app.cochat.ai/papers/10.1109/28.67536
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Schwarzbauer, H., & Kuhnert, R. (1991). Novel large area joining technique for improved power device performance. IEEE Transactions on Industry Applications. https://doi.org/10.1109/28.67536

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