The DOI matches its Crossref record; 1 of the 1 references it cites were found in a registry or an index.
Test pattern generation using Boolean satisfiability
Abstract
The author describes the Boolean satisfiability method for generating test patterns for single stuck-at faults in combinational circuits. This new method generates test patterns in two steps: first, it constructs a formula expressing the Boolean difference between the unfaulted and faulted circuits, and second, it applies a Boolean satisfiability algorithm to the resulting formula. This approach differs from previous methods now in use, which search the circuit structure directly instead of constructing a formula from it. The new method is general and effective. It allows for the addition of heuristics used by structural search methods, and it has produced excellent results on popular test pattern generation benchmarks.>
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Citations
Cites
The complexity of theorem-proving procedures
Cook, S. A. (1971) · Proceedings of the third annual ACM symposium on Theory of computing - STOC '71 · doi:10.1145/800157.805047 · Cited by 6,385
Cited by
Eén, N., & Sörensson, N. (2004) · Lecture Notes in Computer Science · doi:10.1007/978-3-540-24605-3_37 · Cited by 2,629
Combinational test generation using satisfiability
Stephan, P., Brayton, R. K., & Sangiovanni-Vincentelli, A. L. (1996) · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · doi:10.1109/43.536723 · Cited by 326
Knowledge compilation and theory approximation
Selman, B., & Kautz, H. (1996) · Journal of the ACM · doi:10.1145/226643.226644 · Cited by 295
Intriguing Properties of Adversarial ML Attacks in the Problem Space
Pierazzi, F., Pendlebury, F., Cortellazzi, J., & Cavallaro, L. (2020) · 2020 IEEE Symposium on Security and Privacy (SP) · doi:10.1109/sp40000.2020.00073 · Cited by 287
A survey of recent advances in SAT-based formal verification
Prasad, M. R., Biere, A., & Gupta, A. (2005) · International Journal on Software Tools for Technology Transfer · doi:10.1007/s10009-004-0183-4 · Cited by 279
Metadata
- Authors
- Larrabee, T.
- Venue
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Published
- 1992
- Volume
- 11
- Issue
- 1
- Pages
- 4-15
- ISSN
- 0278-0070 (ISSN-L)
- OpenAlex
- W2160444875
- Cited by
- 703
- References
- 1
- FWCI
- 14.40
- Type
- journal article
- Language
- en
- Open access
- closed
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- Larrabee, T. (1992). Test pattern generation using Boolean satisfiability. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. https://doi.org/10.1109/43.108614
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Contains information from the Semantic Scholar Academic Graph Datasets, made available under the ODC Attribution License (ODC-BY 1.0).
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