The DOI matches its Crossref record; 7 of the 7 references it cites were found in a registry or an index.
Design and Implementation of Low-Area and Low-Power AES Encryption Hardware Core
Abstract
The Advanced Encryption Standard (AES) algorithm has become the default choice for various security services in numerous applications. In this paper we present an AES encryption hardware core suited for devices in which low cost and low power consumption are desired. The core constitutes of a novel 8-bit architecture and supports encryption with 128-bit keys. In a 0.13 mum CMOS technology our area optimized implementation consumes 3.1 kgates. The throughput at the maximum clock frequency of 153 MHz is 121 Mbps, also in feedback encryption modes. Compared to previous 8-bit implementations, we achieve significantly higher throughput with corresponding area. The energy consumption per processed block is also lower
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Citations
Cites
Strong Authentication for RFID Systems Using the AES Algorithm
Feldhofer, M., Dominikus, S., & Wolkerstorfer, J. (2004) · Lecture Notes in Computer Science · doi:10.1007/978-3-540-28632-5_26 · Cited by 715
A Compact Rijndael Hardware Architecture with S-Box Optimization
Satoh, A., Morioka, S., Takano, K., & Munetoh, S. (2001) · Lecture Notes in Computer Science · doi:10.1007/3-540-45682-1_15 · Cited by 683
Canright, D. (2005) · Lecture Notes in Computer Science · doi:10.1007/11545262_32 · Cited by 530
AES implementation on a grain of sand
Feldhofer, M., Wolkerstorfer, J., & Rijmen, V. (2005) · IEE Proceedings - Information Security · doi:10.1049/ip-ifs:20055006 · Cited by 376
Very Compact FPGA Implementation of the AES Algorithm
Chodowiec, P., & Gaj, K. (2003) · Lecture notes in computer science · doi:10.1007/978-3-540-45238-6_26 · Cited by 313
AES on FPGA from the Fastest to the Smallest
Good, T., & Benaissa, M. (2005) · Lecture Notes in Computer Science · doi:10.1007/11545262_31 · Cited by 233
Rouvroy, G., Standaert, F.-X., Quisquater, J.-J., & Legat, J.-D. (2004) · International Conference on Information Technology: Coding and Computing, 2004. Proceedings. ITCC 2004. · doi:10.1109/itcc.2004.1286716 · Cited by 159
Cited by
Guo, J., Peyrin, T., Poschmann, A., & Robshaw, M. (2011) · Lecture Notes in Computer Science · doi:10.1007/978-3-642-23951-9_22 · Cited by 773
KATAN and KTANTAN — A Family of Small and Efficient Hardware-Oriented Block Ciphers
De Cannière, C., Dunkelman, O., & Knežević, M. (2009) · Lecture Notes in Computer Science · doi:10.1007/978-3-642-04138-9_20 · Cited by 678
KLEIN: A New Family of Lightweight Block Ciphers
Gong, Z., Nikova, S., & Law, Y. W. (2012) · Lecture Notes in Computer Science · doi:10.1007/978-3-642-25286-0_1 · Cited by 405
Robustness, Security and Privacy in Location-Based Services for Future IoT: A Survey
Chen, L., Thombre, S., Jarvinen, K., Lohan, E. S., Alen-Savikko, A., Leppakoski, H., Bhuiyan, M. Z. H., Bu-Pasha, S., Ferrara, G. N., Honkala, S., et al. (2017) · IEEE Access · doi:10.1109/access.2017.2695525 · Cited by 313
An ultra-high throughput and fully pipelined implementation of AES algorithm on FPGA
Soltani, A., & Sharifian, S. (2015) · Microprocessors and Microsystems · doi:10.1016/j.micpro.2015.07.005 · Cited by 100
Metadata
- Authors
- Hamalainen, P., Alho, T., Hannikainen, M., & Hamalainen, T. D.
- Venue
- 9th EUROMICRO Conference on Digital System Design (DSD'06)
- Publisher
- IEEE
- Published
- 2006
- Pages
- 577-583
- OpenAlex
- W2163354454
- Cited by
- 285
- References
- 7
- FWCI
- 4.08
- Type
- conference paper
- Language
- en
- Open access
- closed
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Bibliographic data: Semantic Scholar, OpenAlex, Crossref.
Contains information from the Semantic Scholar Academic Graph Datasets, made available under the ODC Attribution License (ODC-BY 1.0).
Semantic Scholar’s data is described in: Kinney, R., et al. (2023). The Semantic Scholar Open Data Platform. arXiv:2301.10140.
