Cited by 10Low-power high-performance VLSI designRadio Frequency Integrated Circuit DesignAnalog and Mixed-Signal Circuit Design

A 500 mV 650 pW random number generator in 130 nm CMOS for a UWB localization system

De Roover, Christophe, Steyaert, Michiel·2010·2010 Proceedings of ESSCIRC

Abstract

This paper presents an ultra low power random number generator (RNG) for a UWB RFID and Localization system. It amplifies noise by using a chain of identical inverters to generate a serial output stream of random bits. The circuit consumes only 0.65nW from a supply voltage VDD= 0.5V. The degree of randomness of the output bitstream is examined with the NIST tests.

Integrity signals

Registry

Crossref · 10.1109/esscirc.2010.5619875

Cites

6 of 6 references verified0 citation errors · 0 not checkable

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Authors
De Roover, C., & Steyaert, M.
Affiliations
KU Leuven (BE)
Venue
2010 Proceedings of ESSCIRC
Publisher
IEEE
Published
2010-09
Pages
278-281
ISSN
1930-8833 (ISSN-L)
OpenAlex
W2004694319
Cited by
10
References
7
Citations by year
2025: 1 · 2021: 1 · 2019: 1 · 2018: 2 · 2016: 3 · 2015: 1 · 2012: 1
FWCI
0.44
Type
conference paper
Language
en
Open access
closed
Locations
European Solid-State Circuits Conference (ESSCIRC) (publishedVersion)
Funders
National Institute of Standards and Technology
Topics
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › Low-power high-performance VLSI design
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › Radio Frequency Integrated Circuit Design
  • Physical Sciences › Engineering › Biomedical Engineering › Analog and Mixed-Signal Circuit Design
Keywords
random number generators, ultra-low power, ultra-wideband, UWB positioning, noise amplification, inverter chain, 130 nm CMOS, NIST randomness tests

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