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Transistor matching in analog CMOS applications

Pelgrom, M.J.M., Tuinhout, H.P., Vertregt, M.·2002·International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217)

Abstract

This paper gives an overview of MOSFET mismatch effects that form a performance/yield limitation for many designs. After a general description of (mis)matching, a comparison over past and future process generations is presented. The application of the matching model in CAD and analog circuit design is discussed. Mismatch effects gain importance as critical dimensions and CMOS power supply voltages decrease.

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Crossref · 10.1109/iedm.1998.746503

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Metadata

Authors
Pelgrom, M. J. M., Tuinhout, H. P., & Vertregt, M.
Venue
International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217)
Publisher
IEEE
Published
2002-11-27
Pages
915-918
ISSN
0163-1918 (ISSN-L)
OpenAlex
W2536505949
Cited by
306
References
0
FWCI
27.32
Type
conference paper
Language
en
Open access
closed

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CoChat. (2026). Citation check: Transistor matching in analog CMOS applications. https://app.cochat.ai/papers/10.1109/iedm.1998.746503
The paper
Pelgrom, M. J. M., Tuinhout, H. P., & Vertregt, M. (2002). Transistor matching in analog CMOS applications. International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217). https://doi.org/10.1109/iedm.1998.746503

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Contains information from the Semantic Scholar Academic Graph Datasets, made available under the ODC Attribution License (ODC-BY 1.0).

Semantic Scholar’s data is described in: Kinney, R., et al. (2023). The Semantic Scholar Open Data Platform. arXiv:2301.10140.