The DOI matches its Crossref record; 11 of the 11 references it cites were found in a registry or an index.
Device mismatch and tradeoffs in the design of analog circuits
Abstract
Random device mismatch plays an important role in the design of accurate analog circuits. Models for the matching of MOS and bipolar devices from open literature show that matching improves with increasing device area. As a result, accuracy requirements impose a minimal device area and this paper explores the impact of this constraint on the performance of general analog circuits. It results in a fixed bandwidth-accuracy-power tradeoff which is set by technology constants. This tradeoff is independent of bias point for bipolar circuits whereas for MOS circuits some bias point optimizations are possible. The performance limitations imposed by matching are compared to the limits imposed by thermal noise. For MOS circuits the power constraints due to matching are several orders of magnitude higher than for thermal noise. For the bipolar case the constraints due to noise and matching are of comparable order of magnitude. The impact of technology scaling on the conclusions of this work are briefly explored.
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Citations
Cites
Design of Analog CMOS Integrated Circuits
Razavi, B. (1999) · Cited by 6,609
Analysis and Design of Analog Integrated Circuits
Betts, W. R. (1978) · Electronics and Power · doi:10.1049/ep.1978.0296 · Cited by 3,827
Analysis and Design of Analog Integrated Circuits
Gray, P. R., & Meyer, R. G. (1977) · Cited by 3,487
Matching properties of MOS transistors
Pelgrom, M. J. M., Duinmaijer, A. C. J., & Welbers, A. P. G. (1989) · IEEE Journal of Solid-State Circuits · doi:10.1109/jssc.1989.572629 · Cited by 3,319
Operation and modeling of the MOS transistor
Tsividis, Y. (1987) · Cited by 3,138
Design of analog integrated circuits and systems
(1995) · Choice Reviews Online · doi:10.5860/choice.32-2760 · Cited by 862
Random error effects in matched MOS capacitors and current sources
Shyu, J.-B., Temes, G. C., & Krummenacher, F. (1984) · IEEE Journal of Solid-State Circuits · doi:10.1109/jssc.1984.1052250 · Cited by 322
Transistor matching in analog CMOS applications
Pelgrom, M. J. M., Tuinhout, H. P., & Vertregt, M. (2002) · International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217) · doi:10.1109/iedm.1998.746503 · Cited by 306
Enz, C. C., Vittoz, E. A., & Krummenacher, F. (1987) · IEEE Journal of Solid-State Circuits · doi:10.1109/jssc.1987.1052730 · Cited by 241
Future of analog in the VLSI environment
Vittoz, E. A. (2002) · IEEE International Symposium on Circuits and Systems · doi:10.1109/iscas.1990.112386 · Cited by 199
Cited by
Stimulus-artifact elimination in a multi-electrode system.
Brown, E. A., Ross, J. D., Blum, R. A., Nam, Y., Wheeler, B. C., & DeWeerth, S. P. (2008) · IEEE Transactions on Biomedical Circuits and Systems · doi:10.1109/tbcas.2008.918285 · Cited by 95
Noise, Distortion and Mismatch
(2017) · Systematic Design of Analog CMOS Circuits · doi:10.1017/9781108125840.004 · Cited by 1
Metadata
- Authors
- Kinget, P. R.
- Venue
- IEEE Journal of Solid-State Circuits
- Published
- 2005-06
- Volume
- 40
- Issue
- 6
- Pages
- 1212-1224
- ISSN
- 0018-9200 (ISSN-L)
- OpenAlex
- W2140281076
- Cited by
- 478
- References
- 11
- FWCI
- 20.24
- Type
- journal article
- Language
- en
- Open access
- closed
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