The DOI matches its Crossref record; 0 of the 13 references it cites were found in a registry or an index.
3nm GAA Technology featuring Multi-Bridge-Channel FET for Low Power and High Performance Applications
Abstract
As the most feasible solution beyond FinFET technology, a gate-all-around Multi-Bridge-Channel MOSFET (MBCFET) technology is successfully demonstrated including a fully working high density SRAM. MBCFETs are fabricated using 90% or more of FinFET processes with only a few revised masks, allowing easy migration from FinFET process. Not only on-target but also multiple Vt is achieved in challengingly limited vertical spacing between channels. Also, reliability of MBCFETs is shown to be comparable to that of FinFETs. Three representative superior characteristics of MBCFET compared to FinFET have been demonstrated — better gate control with 65 mV/dec sub-threshold swing (SS) at short gate length, higher DC performance with a larger effective channel width (Weff) at reference footprint, and design flexibility with variable nanosheet (NS) widths. The optimization of the standard cell design by using variable NS width is evaluated. The usefulness of MBCFET as a multi-purpose performance provider is proven by the modulation of effective capacitance (Ceff), effective resistance (Reff) and frequency by Weff control. Finally, mass production feasibility with MBCFET is proven through a fully working high density SRAM circuit.
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In the citing paper
“The lack of process margin to further scale fins, combined with parasitic effects that counteract performance increases at higher fin heights, means that finFETs have reached their limits of scaling and performance 96 .”
From Extreme ultraviolet lithography (2024) · cites this paper as [96]
In the citing paper
“This led to the introduction of gate -allaround field -effect transistor (GAAFET or nanosheet) technology in HVM, wherein the transistor channels are in stacked nanosheets with the gate wrapped around them 96 , 97 .”
From Extreme ultraviolet lithography (2024) · cites this paper as [96]
Citations
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mertens (2016) · IEDM
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sun (2007) · Journal of Appllied Physics
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kim (2015) · SOI-3D-Subthreshold Microelectrics
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barraud (2017) · IEDM
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lee (2003) · Trans Nanotechnol
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jeong (2018) · Symposium on VLSI
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kim (2006) · Symposium on VLSI
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lee (2005) · Symposium on VLSI
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mertens (2017) · IEDM
UnresolvedUntitled work
loubet (2017) · Symposium on VLSI
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Cited by
Sorted by citations
High Current Density in Monolayer MoS 2 Doped by AlO x
McClellan, C. J., Yalon, E., Smithe, K. K. H., Suryavanshi, S. V., & Pop, E. (2021) · ACS Nano · doi:10.1021/acsnano.0c09078 · Cited by 270
2D semiconductors for specific electronic applications: from device to system
Huang, X., Liu, C., & Zhou, P. (2022) · npj 2D Materials and Applications · doi:10.1038/s41699-022-00327-3 · Cited by 247
State of the Art and Future Perspectives in Advanced CMOS Technology
Radamson, H. H., Zhu, H., Wu, Z., He, X., Lin, H., Liu, J., Xiang, J., Kong, Z., Xiong, W., Li, J., et al. (2020) · Nanomaterials · doi:10.3390/nano10081555 · Cited by 235
“The scalloped fin FinFET including all previous HKMG technology also has a large control area and provides a great improvement of SCEs.”
BackgroundInfluentialTransistor engineering based on 2D materials in the post-silicon era
Zeng, S., Liu, C., & Zhou, P. (2024) · Nature Reviews Electrical Engineering · doi:10.1038/s44287-024-00045-6 · Cited by 197
New structure transistors for advanced technology node CMOS ICs
Zhang, Q., Zhang, Y., Luo, Y., et al. (2024) · National Science Review · doi:10.1093/nsr/nwae008 · Cited by 181
“More recently, Samsung reported stacked three-layer Si NS GAAFETs with 12-nm L G s and 48-nm CGP for final industrialized manufacture [34 ].”
Method
Metadata
- Authors
- Bae, G., Bae, D.-I., Kang, M., Hwang, S. M., Kim, S. S., Seo, B., Kwon, T. Y., Lee, T. J., Moon, C., Choi, Y. M., Oikawa, K., Masuoka, S., Chun, K. Y., Park, S. H., Shin, H. J., Kim, J. C., Bhuwalka, K. K., Kim, D. H., Kim, W. J., Yoo, J., Jeon, H. Y., Yang, M. S., Chung, S.-J., Kim, D., Ham, B. H., Park, K. J., Kim, W. D., Park, S. H., Song, G., Kim, Y. H., Kang, M. S., Hwang, K. H., Park, C.-H., Lee, J.-H., Kim, D.-W., Jung, S.-M., & Kang, H. K.
- Affiliations
- Samsung Electronics, Samsung R&D Center, Hwasung-City, Gyeonggi-Do, Republic of Korea
- Samsung (South Korea) (KR)
- ORCID
- Venue
- 2018 IEEE International Electron Devices Meeting (IEDM)
- Publisher
- IEEE
- Published
- 2018-12
- Pages
- 28.7.1-28.7.4
- ISSN
- 0163-1918 (ISSN-L)
- OpenAlex
- W2913404074
- Cited by
- 368
- References
- 13
- Citations by year
- 2026: 38 · 2025: 83 · 2024: 64 · 2023: 52 · 2022: 53 · 2021: 38 · 2020: 27 · 2019: 13
- FWCI
- 31.10
- Type
- conference paper
- Language
- en
- Open access
- closed
- Locations
- Technical digest - International Electron Devices Meeting/Technical digest (publishedVersion)
- Topics
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Advancements in Semiconductor Devices and Circuit Design
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Low-power high-performance VLSI design
- Physical Sciences › Materials Science › Materials Chemistry › 2D Materials and Applications
- Keywords
- gate-all-around MOSFET, subthreshold swing, effective channel width, standard cell design, SRAM, device reliability, low power design, effective capacitance, effective resistance
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