Si nanodevices for random number generating circuits for cryptographic security
Abstract
Small random-number-generating circuits for cryptographic security using Si nano-devices are described. The basis of these circuits is that nano-devices hold random electrical properties naturally that were previously regarded as a negative feature. Results of statistical tests indicate that these circuits generate extremely high-quality random numbers with relatively few transistors.
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All prior true random number generators have suffered from drawbacks in scalability, circuit complexity, or reliance on post-processing such as a Von Neumann corrector to remove bias.
“However, all prior TRNGs have suffered from drawbacks in scalability, circuit complexity, or relied on post-processing such as a “Von Neumann corrector” to remove bias from the generated bit sequences4–13.”
From A novel true random number generator based on a stochastic diffusive memristor (2017) · cites this paper as [11]
Cites
Uchida, K., WATANABE, H. K., Kinoshita, A., et al. (2003) · doi:10.1109/iedm.2002.1175776 · Cited by 313 · see citing works
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A novel true random number generator based on a stochastic diffusive memristor
Jiang, H., Belkin, D., Savel’ev, S. E., Lin, S., Wang, Z., Li, Y., Joshi, S., Midya, R., Li, C., Rao, M., et al. (2017) · Nature Communications · doi:10.1038/s41467-017-00869-x · Cited by 459 · see citing works
A Contact-Resistive Random-Access-Memory-Based True Random Number Generator
Huang, C.-Y., Shen, W. C., Tseng, Y.-H., King, Y.-C., & Lin, C.-J. (2012) · IEEE Electron Device Letters · doi:10.1109/led.2012.2199734 · Cited by 167 · see citing works
A low-power true random number generator using random telegraph noise of single oxide-traps
Brederlow, R., Prakash, R., Paulus, C., & Thewes, R. (2006) · 2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers · doi:10.1109/isscc.2006.1696222 · Cited by 137 · see citing works
True Random Number Generators Using Electrical Noise
Gong, L., Zhang, J., Liu, H., Sang, L., & Wang, Y. (2019) · IEEE Access · doi:10.1109/access.2019.2939027 · Cited by 77 · see citing works
“Fujita proposed using Si nanodevices to produce high-amplitude device noise, which reduced the size of TRNGs and produced high quality random numbers [15].”
BackgroundMethod
- Authors
- Fujita, S., Uchida, K., Yasuda, S., Ohba, R., Nozaki, H., & Tanamoto, T.
- Affiliations
- Toshiba (Japan) (JP)
- Venue
- 2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)
- Publisher
- IEEE
- Published
- 2004-09-28
- Volume
- 47
- Pages
- 294-295
- ISSN
- 0193-6530 (ISSN-L)
- OpenAlex
- W1503544849
- Cited by
- 16
- References
- 1
- Citations by year
- 2025: 1 · 2022: 2 · 2020: 1 · 2019: 1 · 2017: 3 · 2016: 2 · 2015: 1 · 2014: 1 · 2012: 1
- FWCI
- 0.22
- Type
- conference paper
- Language
- en
- Open access
- closed
- Locations
- Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference (publishedVersion)
- Institutional Repositories DataBase (IRDB) (submittedVersion)
- Topics
- Physical Sciences › Computer Science › Hardware and Architecture › Physical Unclonable Functions (PUFs) and Hardware Security
- Physical Sciences › Computer Science › Artificial Intelligence › Cryptographic Implementations and Security
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Low-power high-performance VLSI design
- Keywords
- random number generation, silicon nanodevices, cryptographic security, hardware random number generator, statistical randomness testing, nanoscale electrical properties
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