A low-power true random number generator using random telegraph noise of single oxide-traps
Abstract
A true random number generator is realized by utilizing the noise produced by single oxide traps in small-area MOSFETs in combination with built-in redundancy. The circuit has an area of 0.009mm2in 0.12μm CMOS and consumes 50μW at 200kb/s random output data. The concept is robust against environmental noise and supply-voltage variations and is thus suitable for operation within security controllers
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All prior true random number generators have suffered from drawbacks in scalability, circuit complexity, or reliance on post-processing such as a Von Neumann corrector to remove bias.
“However, all prior TRNGs have suffered from drawbacks in scalability, circuit complexity, or relied on post-processing such as a “Von Neumann corrector” to remove bias from the generated bit sequences4–13.”
From A novel true random number generator based on a stochastic diffusive memristor (2017) · cites this paper as [7]
Cites
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A novel true random number generator based on a stochastic diffusive memristor
Jiang, H., Belkin, D., Savel’ev, S. E., Lin, S., Wang, Z., Li, Y., Joshi, S., Midya, R., Li, C., Rao, M., et al. (2017) · Nature Communications · doi:10.1038/s41467-017-00869-x · Cited by 459 · see citing works
True Random Number Generator With a Metastability-Based Quality Control
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A Contact-Resistive Random-Access-Memory-Based True Random Number Generator
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16.3 A 23Mb/s 23pJ/b fully synthesized true-random-number generator in 28nm and 65nm CMOS
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True Random Number Generation by Variability of Resistive Switching in Oxide-Based Devices
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True Random Number Generator circuits based on single- and multi-phase beat frequency detection
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A 3 $\mu$W CMOS True Random Number Generator With Adaptive Floating-Gate Offset Cancellation
Holleman, J., Bridges, S., Otis, B. P., & Diorio, C. (2008) · IEEE Journal of Solid-State Circuits · doi:10.1109/jssc.2008.920327 · Cited by 63 · see citing works
- Authors
- Brederlow, R., Prakash, R., Paulus, C., & Thewes, R.
- Affiliations
- Infineon Technologies (Germany) (DE)
- Siemens (Germany) (DE)
- ORCID
- Brederlow, R.
- Venue
- 2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers
- Publisher
- IEEE
- Published
- 2006
- Pages
- 1666-1675
- ISSN
- 0193-6530 (ISSN-L)
- OpenAlex
- W2117188320
- Cited by
- 137
- References
- 7
- Citations by year
- 2026: 6 · 2025: 7 · 2024: 6 · 2023: 14 · 2022: 10 · 2021: 15 · 2020: 12 · 2019: 14 · 2018: 6 · 2017: 10 · 2016: 8 · 2015: 5 · 2014: 4 · 2013: 2 · 2012: 1
- FWCI
- 2.04
- Type
- conference paper
- Language
- en
- Open access
- closed
- Locations
- Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference (publishedVersion)
- Topics
- Physical Sciences › Computer Science › Hardware and Architecture › Physical Unclonable Functions (PUFs) and Hardware Security
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Low-power high-performance VLSI design
- Physical Sciences › Engineering › Biomedical Engineering › Analog and Mixed-Signal Circuit Design
- Keywords
- true random number generator, random telegraph noise, oxide traps, MOSFET noise, low power design, CMOS
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