The DOI matches its Crossref record; 7 of the 7 references it cites were found in a registry or an index.
Introduction to flash memory
Abstract
This paper mainly focuses on the development of the NOR flash memory technology, with the aim of describing both the basic functionality of the memory cell used so far and the main cell architecture consolidated today. The NOR cell is basically a floating-gate MOS transistor, programmed by channel hot electron and erased by Fowler-Nordheim tunneling. The main reliability issues, such as charge retention and endurance, are discussed, together with an understanding of the basic physical mechanisms responsible. Most of these considerations are also valid for the NAND cell, since it is based on the same concept of floating-gate MOS transistor. Furthermore, an insight into the multilevel approach, where two bits are stored in the same cell, is presented. In fact, the exploitation of the multilevel approach at each technology node allows an increase of the memory efficiency, almost doubling the density at the same chip size, enlarging the application range and reducing the cost per bit. Finally, NOR flash cell scaling issues are covered, pointing out the main challenges. Flash cell scaling has been demonstrated to be really possible and to be able to follow Moore's law down to the 130-nm technology generations. Technology development and consolidated know-how is expected to sustain the scaling trend down to 90- and 65-nm technology nodes. One of the crucial issues to be solved to allow cell scaling below the 65-nm node is the tunnel oxide thickness reduction, as tunnel thinning is limited by intrinsic and extrinsic mechanisms.
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Cites
Flash memory cells-an overview
Pavan, P., Bez, R., Olivo, P., & Zanoni, E. (1997) · Proceedings of the IEEE · doi:10.1109/5.622505 · Cited by 714
Self-citationMonte Carlo simulation of a 30 nm dual-gate MOSFET: how short can Si go?
Frank, Laux, & Fischetti (1992) · International Technical Digest on Electron Devices Meeting · doi:10.1109/iedm.1992.307422 · Cited by 268
A new reliability model for post-cycling charge retention of flash memories
Belgal, H., Righos, N., Kalastirsky, I., Peterson, J. J., Shiner, R. E., & Mielke, N. R. (2003) · IEEE International Reliability Physics Symposium proceedings · doi:10.1109/relphy.2002.996604 · Cited by 109
Corner-field induced drain leakage in thin oxide MOSFETs
Chang, C., & Lien, J. (1987) · Technical digest - International Electron Devices Meeting/Technical digest · doi:10.1109/iedm.1987.191530 · Cited by 100
MEMORY BEHAVIOR IN A FLOATING-GATE AVALANCHE-INJECTION MOS (FAMOS) STRUCTURE
Frohman-Bentchkowsky, D. (1971) · Applied Physics Letters · doi:10.1063/1.1653685 · Cited by 83
Failure mechanisms of flash cell in program/erase cycling
(2002) · doi:10.1109/iedm.1994.383410 · Cited by 76
"Smart cut": a promising new SOI material technology
BRUEL, M., Aspar, B., Charlet, B., Maleville, C., Poumeyrol, T., Soubie, A., Auberton‐Hervé, A. J., Lamure, J. M., Barge, T., Metral, F., et al. (2002) · IEEE International SOI Conference (SOI) · doi:10.1109/soi.1995.526518 · Cited by 69
Cited by
Organic Nonvolatile Memory Transistors for Flexible Sensor Arrays
Sekitani, T., Yokota, T., Zschieschang, U., Klauk, H., Bauer, S., Takeuchi, K., Takamiya, M., Sakurai, T., & Someya, T. (2009) · Science · doi:10.1126/science.1179963 · Cited by 962
Phase change memory technology
Burr, G. W., Breitwisch, M. J., Franceschini, M., Garetto, D., Gopalakrishnan, K., Jackson, B., Kurdi, B., Lam, C., Lastras, L. A., Padilla, A., et al. (2010) · Journal of Vacuum Science & Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena · doi:10.1116/1.3301579 · Cited by 916
Yetisen, A. K., Martinez‐Hurtado, J. L., Ünal, B., Khademhosseini, A., & Butt, H. (2018) · Advanced Materials · doi:10.1002/adma.201706910 · Cited by 569
Flipping bits in memory without accessing them: An experimental study of DRAM disturbance errors
Kim, Y., Daly, R., Kim, J., Fallin, C., Lee, J. H., Lee, D., Wilkerson, C., Lai, K., & Mutlu, O. (2014) · 2014 ACM/IEEE 41st International Symposium on Computer Architecture (ISCA) · doi:10.1109/isca.2014.6853210 · Cited by 465
Leydecker, T., Herder, M., Pavlica, E., Bratina, G., Hecht, S., Orgiu, E., & Samorì, P. (2016) · Nature Nanotechnology · doi:10.1038/nnano.2016.87 · Cited by 371
Metadata
- Authors
- Bez, R., Camerlenghi, E., Modelli, A., & Visconti, A.
- Venue
- Proceedings of the IEEE
- Published
- 2003-04
- Volume
- 91
- Issue
- 4
- Pages
- 489-502
- ISSN
- 0018-9219 (ISSN-L)
- OpenAlex
- W2110395205
- Cited by
- 836
- References
- 7
- FWCI
- 17.77
- Type
- journal article
- Language
- en
- Open access
- closed
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Contains information from the Semantic Scholar Academic Graph Datasets, made available under the ODC Attribution License (ODC-BY 1.0).
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