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On-chip high-voltage generation in MNOS integrated circuits using an improved voltage multiplier technique
Abstract
An improved voltage multiplier technique has been developed for generating +40 V internally in p-channel MNOS integrated circuits to enable them to be operated from standard +5- and -12-V supply rails. With this technique, the multiplication efficiency and current driving capability are both independent of the number of multiplier stages. A mathematical model and simple equivalent circuit have been developed for the multiplier and the predicted performance agrees well with measured results. A multiplier has already been incorporated into a TTL compatible nonvolatile quad-latch, in which it occupies a chip area of 600 /spl mu/m/spl times/240 /spl mu/m. It is operated with a clock frequency of 1 MHz and can supply a maximum load current of about 10 /spl mu/A. The output impedance is 3.2 M/spl Omega/.
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Cited by
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Le, T., Mayaram, K., & Fiez, T. (2008) · IEEE Journal of Solid-State Circuits · doi:10.1109/jssc.2008.920318 · Cited by 734
Charthad, J., Weber, M. J., Chang, T. C., & Arbabian, A. (2015) · IEEE Journal of Solid-State Circuits · doi:10.1109/jssc.2015.2427336 · Cited by 245
An Integrated Implantable Stimulator That is Fail-Safe Without Off-Chip Blocking-Capacitors
Liu, X., Demosthenous, A., & Donaldson, N. (2008) · IEEE Transactions on Biomedical Circuits and Systems · doi:10.1109/tbcas.2008.2003199 · Cited by 118
A Novel Switched-Capacitor Converter With High Voltage Gain
Xie, H., & Li, R. (2019) · IEEE Access · doi:10.1109/access.2019.2931562 · Cited by 50
Rozgic, D., Hokhikyan, V., Jiang, W., Akita, I., Basir - Kazeruni, S., Chandrakumar, H., & Markovic, D. (2018) · IEEE Transactions on Biomedical Circuits and Systems · doi:10.1109/tbcas.2018.2889040 · Cited by 49
Metadata
- Authors
- Dickson, J. F.
- Venue
- IEEE Journal of Solid-State Circuits
- Published
- 1976-06
- Volume
- 11
- Issue
- 3
- Pages
- 374-378
- ISSN
- 0018-9200 (ISSN-L)
- OpenAlex
- W2111323554
- Cited by
- 1,686
- References
- 0
- FWCI
- 0.58
- Type
- journal article
- Language
- en
- Open access
- closed
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- Dickson, J. F. (1976). On-chip high-voltage generation in MNOS integrated circuits using an improved voltage multiplier technique. IEEE Journal of Solid-State Circuits. https://doi.org/10.1109/jssc.1976.1050739
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Contains information from the Semantic Scholar Academic Graph Datasets, made available under the ODC Attribution License (ODC-BY 1.0).
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