Cited by 118Analog and Mixed-Signal Circuit DesignNeuroscience and Neural EngineeringRadio Frequency Integrated Circuit Design

An Integrated Implantable Stimulator That is Fail-Safe Without Off-Chip Blocking-Capacitors

Liu, Xiao, Demosthenous, Andreas, Donaldson, Nick·2008·IEEE Transactions on Biomedical Circuits and Systems

Abstract

We present a neural stimulator chip with an output stage (electrode driving circuit) that is fail-safe under single-fault conditions without the need for off-chip blocking-capacitors. To miniaturize the stimulator output stage two novel techniques are introduced. The first technique is a new current generator circuit reducing to a single step the translation of the digital input bits into the stimulus current, thus minimizing silicon area and power consumption compared to previous works. The current generator uses voltage-controlled resistors implemented by MOS transistors in the deep triode region. The second technique is a new stimulator output stage circuit with blocking-capacitor safety protection using a high-frequency current-switching (HFCS) technique. Unlike conventional stimulator output stage circuits for implantable functional electrical stimulation (FES) systems which require blocking-capacitors in the microfarad range, our proposed approach allows capacitance reduction to the picofarad range, thus the blocking-capacitors can be integrated on-chip. The prototype four-channel neural stimulator chip was fabricated in XFAB's 1-mum silicon-on-insulator CMOS technology and can operate from a power supply between 5-18 V. The stimulus current is generated by active charging and passive discharging. We obtained recordings of action potentials and a strength-duration curve from the sciatic nerve of a frog with the stimulator chip which demonstrate the HFCS technique. The average power consumption for a typical 1-mA 20-Hz single-channel stimulation using a book electrode, is 200 muW from a 6 V power supply. The silicon area occupation is 0.38 mm(2) per channel.

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Crossref · 10.1109/tbcas.2008.2003199

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Authors
Liu, X., Demosthenous, A., & Donaldson, N.
Affiliations
  • University of London (GB)
  • University College London (GB)
Venue
IEEE Transactions on Biomedical Circuits and Systems
Published
2008-09
Volume
2
Issue
3
Pages
231-244
ISSN
  • 1932-4545 (ISSN-L)
  • 1940-9990
OpenAlex
W2139389722
Cited by
118
References
48
Citations by year
2026: 2 · 2025: 4 · 2024: 6 · 2023: 5 · 2022: 5 · 2021: 6 · 2020: 4 · 2019: 2 · 2018: 3 · 2017: 6 · 2016: 7 · 2015: 10 · 2014: 9 · 2013: 7 · 2012: 11
FWCI
6.85
Type
journal article
Language
en
Open access
closed
Locations
  • IEEE Transactions on Biomedical Circuits and Systems (publishedVersion)
  • PubMed (publishedVersion)
  • UCL Discovery (University College London) (submittedVersion)
Funders
  • University College London
  • Engineering and Physical Sciences Research Council (EP/F009593/1)
Topics
  • Physical Sciences › Engineering › Biomedical Engineering › Analog and Mixed-Signal Circuit Design
  • Life Sciences › Neuroscience › Cellular and Molecular Neuroscience › Neuroscience and Neural Engineering
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › Radio Frequency Integrated Circuit Design
Keywords
implantable neural stimulator, fail-safe design, blocking capacitor, current source, voltage-controlled resistor, functional electrical stimulation, SOI CMOS, power consumption, sciatic nerve stimulation, action potential, strength-duration curve

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