Noise in relaxation oscillators
Abstract
The timing jitter in relaxation oscillators is analyzed. This jitter is described by a single normalized equation whose solution allows prediction of noise in practical oscillators. The theory is confirmed by measurements on practical oscillators and is used to develop a prototype low-noise oscillator with a measured jitter of 1.5 ppm RMS.
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Cites
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Phase Noise and Jitter in CMOS Ring Oscillators
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True Random Number Generators Using Electrical Noise
Gong, L., Zhang, J., Liu, H., Sang, L., & Wang, Y. (2019) · IEEE Access · doi:10.1109/access.2019.2939027 · Cited by 77 · see citing works
“The research on phase noise and jitter in oscillator was introduced and developed until 1990s [45], [46].”
BackgroundModeling CMOS Ring Oscillator Performance<newline/> as a Randomness Source
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- Authors
- Abidi, A. A., & Meyer, R. G.
- Affiliations
- AT&T (United States) (US)
- University of California, Berkeley (US)
- ORCID
- Abidi, A.A.
- Venue
- IEEE Journal of Solid-State Circuits
- Published
- 1983-12
- Volume
- 18
- Issue
- 6
- Pages
- 794-802
- ISSN
- 0018-9200 (ISSN-L)
- OpenAlex
- W2143217913
- Cited by
- 228
- References
- 10
- Citations by year
- 2026: 2 · 2025: 3 · 2024: 4 · 2023: 3 · 2022: 6 · 2021: 5 · 2020: 2 · 2019: 4 · 2018: 12 · 2016: 5 · 2015: 9 · 2014: 5 · 2013: 10 · 2012: 11
- FWCI
- 2.23
- Type
- journal article
- Language
- en
- Open access
- closed
- Locations
- IEEE Journal of Solid-State Circuits (publishedVersion)
- Topics
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Advancements in PLL and VCO Technologies
- Physical Sciences › Engineering › Biomedical Engineering › Analog and Mixed-Signal Circuit Design
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Radio Frequency Integrated Circuit Design
- Keywords
- relaxation oscillator, timing jitter, oscillator noise, low-noise oscillators, jitter modeling, phase noise
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