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Cited by 280

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Bridging the Processor-Memory Performance Gapwith 3D IC Technology

Liu, C.C., Ganusov, I., Burtscher, M., Tiwari, S.·2005·IEEE Design and Test of Computers

Abstract

Microprocessor performance has been improving at roughly 60% per year. Memory access times, however, have improved by less than 10% per year. The resulting gap between logic and memory performance has forced microprocessor designs toward complex and power-hungry architectures that support out-of-order and speculative execution. Moreover, processors have been designed with increasingly large cache hierarchies to hide main memory latency. This article examines how 3D IC technology can improve interactions between the processor and memory. Our work examines the performance of a single-core, single-threaded processor under representative work loads. We have shown that reducing memory latency by bringing main memory on chip gives us near-perfect performance. Three-dimensional IC technology can provide the much needed bandwidth without the cost, design complexity, and power issues associated with a large number of off-chip pins. The principal challenge remains the demonstration of a highly manufacturable 3D IC technology with high yield and low cost.

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Metadata

Authors
Liu, C. C., Ganusov, I., Burtscher, M., & Tiwari, S.
Venue
IEEE Design and Test of Computers
Published
2005-06
Volume
22
Issue
6
Pages
556-564
ISSN
0740-7475 (ISSN-L)
OpenAlex
W2122636510
Cited by
280
References
0
FWCI
11.12
Type
journal article
Language
en
Open access
closed

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CoChat. (2026). Citation check: Bridging the Processor-Memory Performance Gapwith 3D IC Technology. https://app.cochat.ai/papers/10.1109/mdt.2005.134
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Liu, C. C., Ganusov, I., Burtscher, M., & Tiwari, S. (2005). Bridging the Processor-Memory Performance Gapwith 3D IC Technology. IEEE Design and Test of Computers. https://doi.org/10.1109/mdt.2005.134

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Semantic Scholar’s data is described in: Kinney, R., et al. (2023). The Semantic Scholar Open Data Platform. arXiv:2301.10140.