The DOI matches its Crossref record; 10 of the 10 references it cites were found in a registry or an index.
3D-Stacked Memory Architectures for Multi-core Processors
Abstract
Three-dimensional integration enables stacking memory directly on top of a microprocessor, thereby significantly reducing wire delay between the two. Previous studies have examined the performance benefits of such an approach, but all of these works only consider commodity 2D DRAM organizations. In this work, we explore more aggressive 3D DRAM organizations that make better use of the additional die-to-die bandwidth provided by 3D stacking, as well as the additional transistor count. Our simulation results show that with a few simple changes to the 3D-DRAM organization, we can achieve a 1.75x speedup over previously proposed 3D-DRAM approaches on our memory-intensive multi-programmed workloads on a quad-core processor. The significant increase in memory system performance makes the L2 miss handling architecture (MHA) a new bottleneck, which we address by combining a novel data structure called the Vector Bloom Filter with dynamic MSHR capacity tuning. Our scalable L2 MHA yields an additional 17.8% performance improvement over our 3D-stacked memory architecture.
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Cites
Space/time trade-offs in hash coding with allowable errors
Bloom, B. H. (1970) · Communications of the ACM · doi:10.1145/362686.362692 · Cited by 7,492
Hitting the memory wall: implications of the obvious
Wulf, W. A., & McKee, S. A. (1995) · ACM SIGARCH Computer Architecture News · doi:10.1145/216585.216588 · Cited by 1,624
Hitting the Memory Wall: Implications of the Obvious
Wulf, W. A., & McKee, S. A. (1995) · Cited by 1,379
Qureshi, M., & Patt, Y. (2006) · 2006 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'06) · doi:10.1109/micro.2006.49 · Cited by 1,094
Die Stacking (3D) Microarchitecture
Black, B., Pantuso, D., Reed, P., Rupley, J., Shankar, S., Shen, J., Webb, C., Annavaram, M., Brekelbaum, N., DeVale, J., et al. (2006) · 2006 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'06) · doi:10.1109/micro.2006.18 · Cited by 603
Self-citationProcessor Design in 3D Die-Stacking Technologies
Loh, G. H., Xie, Y., & Black, B. (2007) · IEEE Micro · doi:10.1109/mm.2007.59 · Cited by 292
Self-citationBridging the Processor-Memory Performance Gapwith 3D IC Technology
Liu, C. C., Ganusov, I., Burtscher, M., & Tiwari, S. (2005) · IEEE Design and Test of Computers · doi:10.1109/mdt.2005.134 · Cited by 280
PicoServer: using 3D stacking technology to enable a compact energy efficient chip multiprocessor
Kgil, T., D'Souza, S., Saidi, A., Binkert, N., Dreslinski, R., Mudge, T., Reinhardt, S., & Flautner, K. (2006) · Proceedings of the 12th international conference on Architectural support for programming languages and operating systems · doi:10.1145/1168857.1168873 · Cited by 189
BioBench: A Benchmark Suite of Bioinformatics Applications
Albayraktaroglu, K., Jaleel, A., Wu, X., Franklin, M., Jacob, B., Tseng, C.-W., & Yeung, D. (2005) · IEEE International Symposium on Performance Analysis of Systems and Software, 2005. ISPASS 2005. · doi:10.1109/ispass.2005.1430554 · Cited by 182
Ghosh, M., & Lee, H.-H. S. (2007) · Proceedings of the ... annual International Symposium on Microarchitecture/Proceedings of the annual International Symposium on Microarchitecture · doi:10.1109/micro.2007.13 · Cited by 148
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Big Data: Astronomical or Genomical?
Stephens, Z. D., Lee, S. Y., Faghri, F., Campbell, R. H., Zhai, C., Efron, M. J., Iyer, R., Schatz, M. C., Sinha, S., & Robinson, G. E. (2015) · PLOS Biology · doi:10.1371/journal.pbio.1002195 · Cited by 1,340
Practical Near-Data Processing for In-Memory Analytics Frameworks
Gao, M., Ayers, G., & Kozyrakis, C. (2015) · 2015 International Conference on Parallel Architecture and Compilation (PACT) · doi:10.1109/pact.2015.22 · Cited by 266
Metadata
- Authors
- Loh, G. H.
- Venue
- 2008 International Symposium on Computer Architecture
- Publisher
- IEEE
- Published
- 2008-06
- Pages
- 453-464
- ISSN
- 1063-6897 (ISSN-L)
- OpenAlex
- W3139689176
- Cited by
- 438
- References
- 10
- FWCI
- 46.09
- Type
- conference paper
- Language
- en
- Open access
- closed
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Contains information from the Semantic Scholar Academic Graph Datasets, made available under the ODC Attribution License (ODC-BY 1.0).
Semantic Scholar’s data is described in: Kinney, R., et al. (2023). The Semantic Scholar Open Data Platform. arXiv:2301.10140.
