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A technique to build a secret key in integrated circuits for identification and authentication applications

Lee, J.W., Daihyun Lim, Gassend, B., Suh, G.E., van Dijk, M., Devadas, S.·2004·2004 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.04CH37525)

Abstract

This paper describes a technique that exploits the statistical delay variations of wires and transistors across ICs to build a secret key unique to each IC. To explore its feasibility, we fabricated a candidate circuit to generate a response based on its delay characteristics. We show that there exists enough delay variation across ICs implementing, the proposed circuit to identify individual ICs. Further. the circuit, functions reliably over a practical range of environmental variation such as temperature and voltage.

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Metadata

Authors
Lee, J. W., Lim, D., Gassend, B., Suh, G. E., van Dijk, M., & Devadas, S.
Venue
2004 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.04CH37525)
Published
2004-10-26
Pages
176-179
ISSN
2166-9600 (ISSN-L)
OpenAlex
W2151759197
Cited by
842
References
0
FWCI
3.69
Type
conference paper
Language
en
Open access
closed

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CoChat. (2026). Citation check: A technique to build a secret key in integrated circuits for identification and authentication applications. https://app.cochat.ai/papers/10.1109/vlsic.2004.1346548
The paper
Lee, J. W., Lim, D., Gassend, B., Suh, G. E., van Dijk, M., & Devadas, S. (2004). A technique to build a secret key in integrated circuits for identification and authentication applications. 2004 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.04CH37525). https://doi.org/10.1109/vlsic.2004.1346548

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Contains information from the Semantic Scholar Academic Graph Datasets, made available under the ODC Attribution License (ODC-BY 1.0).

Semantic Scholar’s data is described in: Kinney, R., et al. (2023). The Semantic Scholar Open Data Platform. arXiv:2301.10140.