A 28NM Integrated True Random Number Generator Harvesting Entropy from MRAM
Abstract
This paper presents an integrated True Random Number Generator (TRNG) based on the random switching behavior of Magnetic Tunnel Junctions (MTJs) under low write current. A complete TRNG is designed with minimal overhead to an existing embedded MRAM in 28nm CMOS. To the best of our knowledge, this is the first experimental study of this random process and the first TRNG implemented with commercial STT-MRAM technology. The prototype adds only 180μm2to a standard MRAM array for TRNG operation. It passes all NIST randomness tests across -25 to 100°C, while consuming 18pJ/bit with 66Mbps throughput at the nominal condition.
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tRNGs such as RRAM or MRAM are widely studied given their inherent switching stochasticity as an entropy source, which relies on material-induced variations.
“For example, tRNGs such as RRAM or MRAM, which are not Si-based complementary metal-oxide semiconductor (CMOS) devices, are widely studied given their inherent switching stochasticity as an entropy source, which relies on material-induced variations (11–18).”
From Cryptographic transistor for true random number generator with low power consumption (2024) · cites this paper as [15]
These tRNGs require a few entropy extraction circuits, each of which consumes power at the milliwatt level.
“However, these tRNGs require a few entropy extraction circuits, each of which consumes power at the milliwatt level.”
From Cryptographic transistor for true random number generator with low power consumption (2024) · cites this paper as [15]
Their lack of compatibility with CMOS fabrication standards makes it difficult to apply them directly to the current CMOS logic platform used for mass production.
“Moreover, their lack of compatibility with CMOS fabrication standards makes it difficult to apply them directly to the current CMOS logic platform used for mass production.”
From Cryptographic transistor for true random number generator with low power consumption (2024) · cites this paper as [15]
Cites
Mathew, S. K., Sheikh, F., Kounavis, M. E., et al. (2011) · IEEE Journal of Solid-State Circuits · doi:10.1109/jssc.2011.2108131 · Cited by 139 · see citing works
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Satpathy, S. K., Mathew, S. K., Kumar, R., Suresh, V., Anders, M. A., Kaul, H., Agarwal, A., Hsu, S., Krishnamurthy, R. K., & De, V. (2019) · IEEE Journal of Solid-State Circuits · doi:10.1109/jssc.2018.2886350 · Cited by 114 · see citing works
Cryptographic transistor for true random number generator with low power consumption
Kim, S.-I., You, H.-J., Kim, M.-S., An, U.-S., Kim, M.-S., Lee, D. H., Ryu, S.-T., & Choi, Y.-K. (2024) · Science Advances · doi:10.1126/sciadv.adk6042 · Cited by 33 · see citing works
SpinDrop: Dropout-Based Bayesian Binary Neural Networks With Spintronic Implementation
Ahmed, S. T., Danouchi, K., Münch, C., Prenat, G., Anghel, L., & Tahoori, M. B. (2023) · IEEE Journal on Emerging and Selected Topics in Circuits and Systems · doi:10.1109/jetcas.2023.3242146 · Cited by 25 · see citing works
- Authors
- Yang, K., Dong, Q., Wang, Z., Shih, Y.-C., Chih, Y.-D., Chang, J., Blaauw, D., & Svlvester, D.
- Affiliations
- Rice University (US)
- Taiwan Semiconductor Manufacturing Company (Taiwan) (TW)
- University of Michigan (US)
- Venue
- 2018 IEEE Symposium on VLSI Circuits
- Publisher
- IEEE
- Published
- 2018-06
- Pages
- 171-172
- ISSN
- 2166-9600 (ISSN-L)
- OpenAlex
- W2899302029
- Cited by
- 57
- References
- 1
- Citations by year
- 2026: 2 · 2025: 4 · 2024: 9 · 2023: 10 · 2022: 12 · 2021: 10 · 2020: 4 · 2019: 6
- FWCI
- 4.30
- Type
- conference paper
- Language
- en
- Open access
- closed
- Locations
- Symposium on VLSI Circuits (publishedVersion)
- Topics
- Physical Sciences › Computer Science › Hardware and Architecture › Physical Unclonable Functions (PUFs) and Hardware Security
- Physical Sciences › Physics and Astronomy › Atomic and Molecular Physics, and Optics › Magnetic properties of thin films
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Low-power high-performance VLSI design
- Keywords
- true random number generator, magnetic tunnel junctions, STT-MRAM, 28nm CMOS, NIST randomness tests
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