Cited by 26Advanced Memory and Neural ComputingMagnetic properties of thin filmsLow-power high-performance VLSI design

SpinDrop: Dropout-Based Bayesian Binary Neural Networks With Spintronic Implementation

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Ahmed, Soyed Tuhin, Danouchi, Kamal, Münch, Christopher, Prenat, Guillaume, Anghel, Lorena, Tahoori, Mehdi B.·2023·IEEE Journal on Emerging and Selected Topics in Circuits and Systems

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Abstract

Neural Networks (NNs) provide an effective solution in numerous application domains, including autonomous driving and medical applications. Nevertheless, NN predictions can be incorrect if the input sample is outside of the training distribution or contaminated by noise. Consequently, quantifying the uncertainty of the NN prediction allows the system to make more insightful decisions by avoiding blind predictions. Therefore, uncertainty quantification is crucial for a variety of applications, including safety-critical applications. Bayesian NN (BayNN) using Dropout-based approximation provides a systematic approach for estimating the uncertainty of predictions. Despite such merit, BayNNs are not suitable for implementation in an embedded device or able to meet high-performance demands for certain applications. Computation in-memory (CiM) architecture with emerging non-volatile memories (NVMs) is a great candidate for high-performance and low-power acceleration BayNNs in hardware. Among NVMs, Magnetic Tunnel Junction (MTJ) offer many benefits, but they also suffer from various non-idealities and limited bit-level resolution. As a result, binarizing BayNNs is an attractive option that can directly implement BayNN into a CiM architecture and able to achieve benefits of both CiM architecture and BayNNs at the same time. Conventional in-memory hardware implementations emphasize conventional NNs, which can only make predictions, and do not account for both device and input uncertainty, thus, reducing both reliability and performance. In this paper, we propose for the first time Binary Bayesian NNs (BinBayNN) with an end-to-end approach (from algorithmic level to device level) for their implementation. Our approach takes the inherent stochastic properties of MTJs as a feature to implement Dropout-based Bayesian Neural Networks. We provide an extensive evaluation of our approach from the device level up to the algorithmic level on various benchmark datasets.

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Crossref · 10.1109/jetcas.2023.3242146

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  • MCD relies on a specialized dropout module that is impractical on MCUs.

    “We exclude MCD due to its reliance on a specialized dropout module (Ahmed et al., 2023), which is impractical on MCUs.”

    From QUTE: Quantifying Uncertainty in TinyML with Early-exit-assisted ensembles for model-monitoring (2024) · cites this paper as Ahmed et al., 2023

    The Spintronic-based Bayesian Dropout Implementation section describes a specialized SpinDrop module for this paper’s STT-MRAM implementation. It does not establish that Monte Carlo dropout generally requires that module, or assess whether the approach is impractical on MCUs; those extensions are unsupported by the cited paper. (LLM, conf=0.85)

    Experimental — accuracy not yet measured

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2 of the 51 references couldn’t be matched to a known paper.

Research works printed but not linked: 2

  1. Lorena Anghel received the Ph.D. degree (cum laude) from Grenoble INP in 2000. From 2016 to 2020, she was the Vice President of Grenoble INP, in charge of industrial relationships, where she is currently the Scientific Director. She is also a Full Professor with Grenoble INP and a member of the Research Staff of the Spintec Laboratory. She has published more than 130 publications in interna- tional conferences and symposia. She has supervised 24 Ph.D. students. Her research interests include hardware design andtest of neural networks, on-line testing, fault tolerance, and reliable design and verification. She was a recipient of several best paper and outstanding paper awards. She had fulfilled positions, such as the General Chair and the Program Chair for many prestigious IEEE conferences including IEEE VTS, IEEE ETS, IEEE NANOARCH, and IEEE On-Line Test Symposium.
  2. ICCAD, FPL, TODAES, and TVLSI. He is a fellow of the IEEE and a recipient of European Research Council (ERC) Advanced Grant.

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Authors
Ahmed, S. T., Danouchi, K., Münch, C., Prenat, G., Anghel, L., & Tahoori, M. B.
Affiliations
  • Karlsruhe Institute of Technology (DE)
  • Institut polytechnique de Grenoble (FR)
Venue
IEEE Journal on Emerging and Selected Topics in Circuits and Systems
Published
2023-03
Volume
13
Issue
1
Pages
150-164
ISSN
  • 2156-3357 (ISSN-L)
  • 2156-3365
OpenAlex
W4319068960
Cited by
25
References
51
Citations by year
2026: 1 · 2025: 9 · 2024: 10 · 2023: 5
FWCI
1.86
Type
journal article
Language
en
Open access
Locations
  • IEEE Journal on Emerging and Selected Topics in Circuits and Systems (publishedVersion)
  • HAL (submittedVersion)
  • Figshare (submittedVersion, cc-by)
Funders
  • Joint Agence Nationale de la Recherche (ANR)-Deutsche Forschungsgemeinschaft (DFG) Grant Neuspin
  • Multidisciplinary Institute in Artificial Intelligence (MIAI) at Grenoble Alpes (ANR-19-P3IA-0)
Topics
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › Advanced Memory and Neural Computing
  • Physical Sciences › Physics and Astronomy › Atomic and Molecular Physics, and Optics › Magnetic properties of thin films
  • Physical Sciences › Engineering › Electrical and Electronic Engineering › Low-power high-performance VLSI design
Keywords
Bayesian neural networks, binary neural networks, spintronics, magnetic tunnel junctions, in-memory computing, uncertainty quantification, non-volatile memory, parameter uncertainty, neural network hardware acceleration, low-power embedded systems

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