CMOS: Circuit Design, Layout, and Simulation
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In typical split capacitive array implementations, an additional unitary capacitor Cf in parallel with the sub DAC capacitors is necessary to provide correct binary weighted steps in the switching.
“In typical implementations of the split capacitive array structure, there is an additional unitary capacitor C f in parallel with the capacitors of the sub DAC.This capacitor C f has one of its plates permanently connected to V CM , and it is necessary to provide correct binary weighted steps in the switching.”
From A low-power 10-bit 0.01-to-12-MS/s asynchronous SAR ADC in 65-nm CMOS (2021) · cites this paper as [11]
For a split capacitive array with L = 4, the bridge capacitor should ideally present a capacitance of (16/15)Cu.
“In this case, the bridge capacitor (C bridge ) should ideally present a capacitance of (16/15)ÁC u , [11] when L = 4.”
From A low-power 10-bit 0.01-to-12-MS/s asynchronous SAR ADC in 65-nm CMOS (2021) · cites this paper as [11]
A split binary-weighted capacitive array structure reduces the required number of unitary capacitors in the DAC.
“A split binary-weighted capacitive array structure [11] was applied in this design to considerably reduce the required number of unitary capacitors in the DAC.”
From A low-power 10-bit 0.01-to-12-MS/s asynchronous SAR ADC in 65-nm CMOS (2021) · cites this paper as [11]
Cited by
Sorted by citations
Saberi, M., Lotfi, R., Mafinezhad, K., & Serdijn, W. A. (2011) · IEEE Transactions on Circuits and Systems I: Regular Papers · doi:10.1109/tcsi.2011.2107214 · Cited by 236 · see citing works
Ghovanloo, M., & Najafi, K. (2005) · IEEE Transactions on Biomedical Engineering · doi:10.1109/tbme.2004.839797 · Cited by 137 · see citing works
An Integrated Implantable Stimulator That is Fail-Safe Without Off-Chip Blocking-Capacitors
Liu, X., Demosthenous, A., & Donaldson, N. (2008) · IEEE Transactions on Biomedical Circuits and Systems · doi:10.1109/tbcas.2008.2003199 · Cited by 118 · see citing works
Nguyen, V. N., Duong, D. N., Chung, Y., & Lee, J.-W. (2018) · Sensors · doi:10.3390/s18113948 · Cited by 15 · see citing works
A batteryless energy harvesting storage system for implantable medical devices demonstrated in situ
Gall, O. Z., Meng, C., Bhamra, H., Mei, H., John, S. W. M., & Irazoqui, P. P. (2019) · Circuits, Systems, and Signal Processing · doi:10.1007/s00034-018-0915-4 · Cited by 13 · see citing works
A low-power 10-bit 0.01-to-12-MS/s asynchronous SAR ADC in 65-nm CMOS
Campos, A. L., Navarro, J., Luppe, M., & de Lima, E. R. (2021) · Analog Integrated Circuits and Signal Processing · doi:10.1007/s10470-020-01742-6 · Cited by 8 · see citing works
- Authors
- Baker, R. J.
- Corresponding author
- Baker, R. Jacob
- ORCID
- Baker, R. Jacob
- Venue
- Wiley eBooks
- Publisher
- Wiley
- Published
- 2010-08-27
- OpenAlex
- W4231501498
- Cited by
- 709
- References
- 0
- Citations by year
- 2026: 18 · 2025: 40 · 2024: 30 · 2023: 56 · 2022: 45 · 2021: 38 · 2020: 50 · 2019: 73 · 2018: 62 · 2017: 64 · 2016: 59 · 2015: 38 · 2014: 41 · 2013: 46 · 2012: 27
- FWCI
- 14.56
- Type
- book
- Language
- en
- Open access
- closed
- Locations
- Wiley eBooks (publishedVersion)
- Topics
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Advancements in Semiconductor Devices and Circuit Design
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Low-power high-performance VLSI design
- Physical Sciences › Engineering › Biomedical Engineering › Analog and Mixed-Signal Circuit Design
- Keywords
- CMOS
About these checks
Registry, retraction, Cites and statistics results are computed, not judged, with one exception: a printed reference that no index lists is read once by a model before it counts as a citation error. Claims are extracted by a model and kept only when their quote appears verbatim in the text; each cited source is then checked, with a model’s help, for whether it says what the claim relies on. Those verdicts can be wrong — read the claim’s quote and the cited source before relying on one.
Statistics and arithmetic are recomputed, not judged.
Confidence bands are shown only for fields calibrated on our annotated test set. None is calibrated yet, so no band is shown.
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