Fidelity benchmarks for two-qubit gates in silicon

Abstract

Universal quantum computation will require qubit technology based on a scalable platform1, together with quantum error correction protocols that place strict limits on the maximum infidelities for one- and two-qubit gate operations2,3. Although various qubit systems have shown high fidelities at the one-qubit level4–10, the only solid-state qubits manufactured using standard lithographic techniques that have demonstrated two-qubit fidelities near the fault-tolerance threshold6 have been in superconductor systems. Silicon-based quantum dot qubits are also amenable to large-scale fabrication and can achieve high single-qubit gate fidelities (exceeding 99.9 per cent) using isotopically enriched silicon11,12. Two-qubit gates have now been demonstrated in a number of systems13–15, but as yet an accurate assessment of their fidelities using Clifford-based randomized benchmarking, which uses sequences of randomly chosen gates to measure the error, has not been achieved. Here, for qubits encoded on the electron spin states of gate-defined quantum dots, we demonstrate Bell state tomography with fidelities ranging from 80 to 89 per cent, and two-qubit randomized benchmarking with an average Clifford gate fidelity of 94.7 per cent and an average controlled-rotation fidelity of 98 per cent. These fidelities are found to be limited by the relatively long gate times used here compared with the decoherence times of the qubits. Silicon qubit designs employing fast gate operations with high Rabi frequencies16,17, together with advanced pulsing techniques18, should therefore enable much higher fidelities in the near future. Two-qubit logic gates in a silicon-based system are shown (using randomized benchmarking) to have high gate fidelities of operation and are used to generate Bell states, a step towards solid-state quantum computation.