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Cited by 699

The DOI matches its Crossref record; 28 of the 28 references it cites were found in a registry or an index.

Frontiers of silicon-on-insulator

Celler, G. K., Cristoloveanu, Sorin·2003·Journal of Applied Physics

Abstract

Silicon-on-insulator (SOI) wafers are precisely engineered multilayer semiconductor/dielectric structures that provide new functionality for advanced Si devices. After more than three decades of materials research and device studies, SOI wafers have entered into the mainstream of semiconductor electronics. SOI technology offers significant advantages in design, fabrication, and performance of many semiconductor circuits. It also improves prospects for extending Si devices into the nanometer region (<10 nm channel length). In this article, we discuss methods of forming SOI wafers, their physical properties, and the latest improvements in controlling the structure parameters. We also describe devices that take advantage of SOI, and consider their electrical characteristics.

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Metadata

Authors
Celler, G. K., & Cristoloveanu, S.
Venue
Journal of Applied Physics
Published
2003-05-01
Volume
93
Issue
9
Pages
4955-4978
ISSN
  • 0021-8979 (ISSN-L)
  • 1089-7550
OpenAlex
W2079699561
Cited by
699
References
28
FWCI
47.26
Type
journal article
Language
en
Open access
closed

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CoChat. (2026). Citation check: Frontiers of silicon-on-insulator. https://app.cochat.ai/papers/10.1063/1.1558223
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Celler, G. K., & Cristoloveanu, S. (2003). Frontiers of silicon-on-insulator. Journal of Applied Physics. https://doi.org/10.1063/1.1558223

Data sources

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Contains information from the Semantic Scholar Academic Graph Datasets, made available under the ODC Attribution License (ODC-BY 1.0).

Semantic Scholar’s data is described in: Kinney, R., et al. (2023). The Semantic Scholar Open Data Platform. arXiv:2301.10140.