The DOI matches its Crossref record; 2 of the 2 references it cites were found in a registry or an index.
Phase-Change Memory Models for Deep Learning Training and Inference
Open accessAbstract
Non-volatile analog memory devices such as phase-change memory (PCM) enable designing dedicated connectivity matrices for the hardware implementation of deep neural networks (DNN). In this in-memory computing approach, the analog conductance states of the memory device can be gradually updated to train DNNs on-chip or software trained connection strengths may be programmed one-time to the devices to create efficient inference engines. Reliable and computationally simple models that capture the non-ideal programming and temporal evolution of the devices are needed for evaluating the training and inference performance of the deep learning hardware based on in-memory computing. In this paper, we present statistically accurate models for PCM, based on the characterization of more than 10,000 devices, that capture the state-dependent nature and variability of the conductance update, conductance drift, and read noise. Integrating the computationally simple device models with deep learning frameworks such as TensorFlow enables us to realistically evaluate training and inference performance of the PCM array based hardware implementations of DNNs.
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These issues cause both MVM read-out and the writing or programming of the conductances to be erroneous and non-deterministic.
“These issues cause both MVM read-out31 and the writing or programming of the conductances32–34 to be erroneous and non-deterministic.”
From Hardware-aware training for large-scale and diverse deep learning inference workloads using in-memory computing-based accelerators (2023) · cites this paper as [31]
The expected weight noise distribution characterized from PCM measurements is generally superior to other noise structures, even when evaluated on an ReRAM-based AIMC evaluation model.
“Rather than simple Gaussian weight noise38, we use the expected weight noise distribution characterized from PCM measurements31 and found it in general superior to other noise structures even when evaluated on an ReRAM-based AIMC evaluation model (see Supplementary Table 5).”
From Hardware-aware training for large-scale and diverse deep learning inference workloads using in-memory computing-based accelerators (2023) · cites this paper as [31]
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Burr, G. W., Shelby, R. M., Sidler, S., di Nolfo, C., Jang, J., Boybat, I., Shenoy, R. S., Narayanan, P., Virwani, K., Giacometti, E. U., et al. (2015) · IEEE Transactions on Electron Devices · doi:10.1109/ted.2015.2439635 · Cited by 936
Self-citationProgramming algorithms for multilevel phase-change memory
Papandreou, N., Pozidis, H., Pantazi, A., Sebastian, A., Breitwisch, M., Lam, C., & Eleftheriou, E. (2011) · 2011 IEEE International Symposium of Circuits and Systems (ISCAS) · doi:10.1109/iscas.2011.5937569 · Cited by 124
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Accurate deep neural network inference using computational phase-change memory
Joshi, V., Le Gallo, M., Haefeli, S., Boybat, I., Nandakumar, S. R., Piveteau, C., Dazzi, M., Rajendran, B., Sebastian, A., & Eleftheriou, E. (2020) · Nature Communications · doi:10.1038/s41467-020-16108-9 · Cited by 490
Self-citationLe Gallo, M., Khaddam-Aljameh, R., Stanisavljevic, M., Vasilopoulos, A., Kersting, B., Dazzi, M., Karunaratne, G., Brändli, M., Singh, A., Müller, S. M., et al. (2023) · Nature Electronics · doi:10.1038/s41928-023-01010-1 · Cited by 310
Self-citationRasch, M. J., Mackin, C., Le Gallo, M., Chen, A., Fasoli, A., Odermatt, F., Li, N., Nandakumar, S. R., Narayanan, P., Tsai, H., et al. (2023) · Nature Communications · doi:10.1038/s41467-023-40770-4 · Cited by 213
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Metadata
- Authors
- Nandakumar, S. R., Boybat, I., Joshi, V., Piveteau, C., Le Gallo, M., Rajendran, B., Sebastian, A., & Eleftheriou, E.
- Affiliations
- IBM Research - Zurich (CH)
- École Polytechnique Fédérale de Lausanne (CH)
- New Jersey Institute of Technology (US)
- ETH Zurich (CH)
- IBM Research - Zurich,Rüschlikon,Switzerland,8803
- ORCID
- Venue
- 2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
- Publisher
- IEEE
- Published
- 2019-11
- Pages
- 727-730
- OpenAlex
- W3003151806
- Cited by
- 34
- References
- 2
- Citations by year
- 2026: 5 · 2025: 8 · 2024: 5 · 2023: 7 · 2022: 3 · 2021: 1 · 2020: 4 · 2019: 1
- FWCI
- 3.58
- Type
- conference paper
- Language
- en
- Open access
- green
- infoscience.epfl.ch
- Locations
- IEEE International Conference on Electronics, Circuits and Systems (ICECS) (publishedVersion)
- Infoscience (Ecole Polytechnique Fédérale de Lausanne) (submittedVersion, cc-by-nc-nd)
- Research Portal (King's College London) (submittedVersion)
- Topics
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Advanced Memory and Neural Computing
- Physical Sciences › Materials Science › Materials Chemistry › Phase-change materials and chalcogenides
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Ferroelectric and Negative Capacitance Devices
- Keywords
- phase-change memory, in-memory computing, device modeling, conductance drift, readout noise, on-chip learning, inference engine, device variability
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