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Reducing the Impact of Phase-Change Memory Conductance Drift on the Inference of large-scale Hardware Neural Networks
Abstract
We extensively analyze the impact of conductance "drift" - inherent to Phase Change Memory (PCM) devices - on the inference of pre-trained Deep Neural Networks (DNNs). Starting from large-array experimental characterization of PCM drift in partial-SET states, we build a statistical model of conductance drift capturing the cycle-to-cycle variability in drift-coefficient ν observed empirically. Using a variety of small and large DNNs (few-layer perceptrons using MNIST dataset, ResNet-(10,18,34) using CIFAR-10, and a 2-layer LSTM using "Alice in Wonderland"), we characterize how the combination of drift and ν-variability can induce long-term degradations in DNN accuracy. We then introduce several techniques to suppress these effects, including "slope correction" and modifications to the DNN architecture (choice of squashing function, the number of hidden units, hidden layers, or convolution filters). Finally, we show how noise sources such as 1/f and Random Telegraph Noise (RTN), and device-to-device variability in heater diameter, can complicate the accurate measurement of PCM drift.
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The GDC calibration is computed from the device data itself, without resorting to any assumption on how the conductance changes nor requiring extra timing information.
“Moreover, is computed from the device data itself, without resorting to any assumption on how the conductance changes nor requiring extra timing information60.”
From Accurate deep neural network inference using computational phase-change memory (2020) · cites this paper as [60]
Conductances can evolve over time after programming.
“Worse yet, conductances can evolve over time after programming35–37.”
From Hardware-aware training for large-scale and diverse deep learning inference workloads using in-memory computing-based accelerators (2023) · cites this paper as [36]
For evaluation times long after NVM programming, conductance drift can be compensated in the digital domain without expensive re-programming.
“For evaluation times teval long after NVM programming, the conductance drift Eq. (8) can be compensated in the digital domain without any expensive re-programming36,73.”
From Hardware-aware training for large-scale and diverse deep learning inference workloads using in-memory computing-based accelerators (2023) · cites this paper as [36]
Citations
Cites
Equivalent-accuracy accelerated neural-network training using analogue memory
Ambrogio, S., Narayanan, P., Tsai, H., Shelby, R. M., Boybat, I., di Nolfo, C., Sidler, S., Giordano, M., Bodini, M., Farinha, N. C. P., et al. (2018) · Nature · doi:10.1038/s41586-018-0180-5 · Cited by 1,151
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Sorted by citations
Physics for neuromorphic computing
Marković, D., Mizrahi, F. A., Querlioz, D., & Grollier, J. (2020) · Emerging Topics in Artificial Intelligence (ETAI) · doi:10.1038/s42254-020-0208-2 · Cited by 1,260
Accurate deep neural network inference using computational phase-change memory
Joshi, V., Le Gallo, M., Haefeli, S., Boybat, I., Nandakumar, S. R., Piveteau, C., Dazzi, M., Rajendran, B., Sebastian, A., & Eleftheriou, E. (2020) · Nature Communications · doi:10.1038/s41467-020-16108-9 · Cited by 490
Analog architectures for neural network acceleration based on non-volatile memory
Xiao, T. P., Bennett, C. H., Feinberg, B., Agarwal, S., & Marinella, M. J. (2020) · Applied Physics Reviews · doi:10.1063/1.5143815 · Cited by 207
Rasch, M. J., Mackin, C., Le Gallo, M., Chen, A., Fasoli, A., Odermatt, F., Li, N., Nandakumar, S. R., Narayanan, P., Tsai, H., et al. (2023) · Nature Communications · doi:10.1038/s41467-023-40770-4 · Cited by 213
Self-citationUsing the IBM Analog In-Memory Hardware Acceleration Kit for Neural Network Training and Inference
Gallo, M. L., Lammie, C., Büchel, J., Carta, F., Fagbohungbe, O. I., Mackin, C., Tsai, H., Narayanan, V., Sebastian, A., Maghraoui, K. E., et al. (2023) · APL Machine Learning · doi:10.1063/5.0168089 · Cited by 88
Self-citationNarayanan, P., Ambrogio, S., Okazaki, A., Hosokawa, K., Tsai, H., Nomura, A., Yasuda, T., Mackin, C., Lewis, S. C., Friz, A., et al. (2021) · IEEE Transactions on Electron Devices · doi:10.1109/ted.2021.3115993 · Cited by 85
“Drift mitigation will need a multi-pronged approach across device engineering [22], programming procedure, circuit slope correction [23] as well as algorithms, including drift-aware training approaches– [17], [24], [25].”
BackgroundSelf-citationJain, S., Tsai, H., Chen, C.-T., Muralidhar, R., Boybat, I., Frank, M. M., Woźniak, S., Stanisavljevic, M., Adusumilli, P., Narayanan, P., et al. (2023) · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · doi:10.1109/tvlsi.2022.3221390 · Cited by 76
“To achieve software-equivalent accuracy even in the presence of noise and imperfections in both analog devices and peripheral circuits, we assume an AI inference model prepared by hardware-aware training [40], [41], [42].”
BackgroundMethodResultInfluentialSelf-citationNandakumar, S. R., Boybat, I., Gallo, M. L., Eleftheriou, E. S., Sebastian, A., & Rajendran, B. (2020) · Scientific Reports · doi:10.1038/s41598-020-64878-5 · Cited by 90
Spontaneous sparse learning for PCM-based memristor neural networks
Lim, D., Wu, S., Zhao, R. J., Lee, J.-H., Jeong, H., & Shi, L. (2021) · Nature Communications · doi:10.1038/s41467-020-20519-z · Cited by 67
“Unlike the passive approach of suppressing the drift effect, our SSL promotes the fusion of computer-based neural algorithms with the intrinsic properties of memristor devices 44 – 46 .”
MethodOptimised weight programming for analogue memory-based deep neural networks
Mackin, C., Rasch, M. J., Chen, A., Timcheck, J., Bruce, R. L., Li, N., Narayanan, P., Ambrogio, S., Gallo, M. L., Nandakumar, S. R., et al. (2022) · Nature Communications · doi:10.1038/s41467-022-31405-1 · Cited by 62
Self-citationPrecision of bit slicing with in-memory computing based on analog phase-change memory crossbars
Gallo, M. L., Nandakumar, S. R., Ciric, L., Boybat, I., Khaddam-Aljameh, R., Mackin, C., & Sebastian, A. (2022) · Neuromorphic Computing and Engineering · doi:10.1088/2634-4386/ac4fb7 · Cited by 43
“Global drift compensation (GDC) has been shown to be an effective tool to mitigate the effect of conductance drift in PCM on the MVM accuracy [5, 7, 36].”
MethodSelf-citationIn-Memory Computing for Machine Learning and Deep Learning
Lepri, N., Glukhov, A., Cattaneo, L., Farronato, M., Mannocci, P., & Ielmini, D. (2023) · IEEE Journal of the Electron Devices Society · doi:10.1109/jeds.2023.3265875 · Cited by 52
“Drift can also affect the polycrystalline phase in multilevel PCM devices, as a result of residual amorphous regions [167], [180].”
BackgroundLou, Q., Janga, S. C., & Jiang, L. (2020) · International Conference on Parallel Architectures and Compilation Techniques (PACT) · doi:10.1145/3410463.3414626 · Cited by 24
Antolini, A., Paolino, C., Zavalloni, F., Lico, A., Scarselli, E. F., Mangia, M., Pareschi, F., Setti, G., Rovatti, R., Torres, M. L., et al. (2023) · IEEE Journal on Emerging and Selected Topics in Circuits and Systems · doi:10.1109/jetcas.2023.3241750 · Cited by 40
“This is thought to be the effect of the additional redundancy introduced by the larger number of weights, as in [42].”
BackgroundSpoon, K., Tsai, H., Chen, A., Rasch, M. J., Ambrogio, S., Mackin, C., Fasoli, A., Friz, A. M., Narayanan, P., Stanisavljevic, M., et al. (2021) · Frontiers in Computational Neuroscience · doi:10.3389/fncom.2021.675741 · Cited by 26
“However, NVM devices exhibit many conductance instabilities [conductance drift (Ambrogio et al., 2019), programming and read noise (Tsai et al.”
BackgroundSelf-citationDealing with Non-Idealities in Memristor Based Computation-In-Memory Designs
Gebregiorgis, A., Singh, A., Diware, S., Bishnoi, R., & Hamdioui, S. (2022) · IEEE/IFIP International Conference on Very Large Scale Integration of System-on-Chip · doi:10.1109/vlsi-soc54400.2022.9939618 · Cited by 23
Understanding Interface-Controlled Resistance Drift in Superlattice Phase Change Memory
Wu, X., Khan, A. I., Ramesh, P., Perez, C., Kim, K., Lee, Z., Saraswat, K., Goodson, K., Wong, H. P., & Pop, E. (2022) · IEEE Electron Device Letters · doi:10.1109/led.2022.3203971 · Cited by 21
“duration of drift measurement for various PCMs [8], [10], [11], [15], [24], [25], [26], [27], [28], [29] and our SL-PCMs.”
BackgroundMethodInfluentialDifferential Phase Change Memory (PCM) Cell for Drift-Compensated In-Memory Computing
Pistolesi, L., Ravelli, L., Glukhov, A., Herranz, A. D. G., López-Vallejo, M., Carissimi, M., Pasotti, M., Rolandi, P. L., Redaelli, A., Martín, I., et al. (2024) · IEEE Transactions on Electron Devices · doi:10.1109/ted.2024.3480898 · Cited by 16
“Several drift compensation schemes have already been proposed in previous works [18], [19], [20], [21], with part of them being validated after annealing up to 90 C [21], [22].”
Device quantization policy in variation-aware in-memory computing design
Chang, C.-C., Li, S.-T., Pan, T.-L., Tsai, C.-M., Wang, I.-T., Chang, T.-S., & Hou, T. (2022) · Scientific Reports · doi:10.1038/s41598-021-04159-x · Cited by 15
“Although rich literature has discussed various process innovation 21 or closed/open-loop programming schemes 22 to increase the number of quantized memory states, the ultimate number of quantization levels in a memory device is determined by the dynamic range, e.g. conductance ratio ( G H / G L )…”
Background28 nm FDSOI embedded PCM exhibiting near zero drift at 12 K for cryogenic SNNs
Palhares, J. H. Q., Garg, N., Mouny, P.-A., Beilliard, Y., Sandrini, J., Arnaud, F., Anghel, L., Alibart, F., Drouin, D., & Galy, P. (2024) · npj Unconventional Computing · doi:10.1038/s44335-024-00008-y · Cited by 12
“However, theePCMnon-idealresistancedriftphenomenondeservescarefulattention inthecontextofmultilevelmemorysystems 9,30 .”
Han, L.-X., Huang, P., Wang, Y., Zhou, Z., Zhang, Y., Liu, X.-Y., & Kang, J.-F. (2022) · IEEE Transactions on Circuits and Systems Part 1: Regular Papers · doi:10.1109/tcsi.2022.3194918 · Cited by 12
“Instead, NVM such as RRAM [7]–[20], PCM [25]–[27], FeFET [28], [29], MRAM [30], [31], [33], and Flash [21]–[24] are promising to be preferred memory due to their potential in high-density, low power, and non-volatility.”
BackgroundAstromorphic Self-Repair of Neuromorphic Hardware Systems
Han, Z., Islam, A. N. M. N., & Sengupta, A. (2022) · AAAI Conference on Artificial Intelligence · doi:10.48550/arxiv.2209.07428 · Cited by 12
“The drift fault pattern is extracted from the temporal PCM device characteristics (Ambrogio et al. 2019).”
BackgroundMethodMuñoz-Martín, I., Bianchi, S., Melnic, O., Bonfanti, A. G., & Ielmini, D. (2021) · IEEE Transactions on Electron Devices · doi:10.1109/ted.2021.3118996 · Cited by 15
“analytical analysis of the drift evolution [14]–[16]; (IV) the design of specific neural networks robust against the drift of the weights [17]–[20].”
BackgroundNovel Weight Mapping Method for Reliable NVM based Neural Network
Han, L.-X., Xiang, Y.-C., Huang, P., Yu, G.-H., Han, R., Liu, X.-Y., & Kang, J.-F. (2021) · IEEE International Reliability Physics Symposium · doi:10.1109/irps46558.2021.9405200 · Cited by 11
“Emerging memories such as RRAM[1-7], PCM[11-14] as well as mainstream memories such as Flash[15-16] have been investigated for hardware implementation of neural network.”
BackgroundDemonstration of transformer-based ALBERT model on a 14nm analog AI inference chip
Chen, A., Ambrogio, S., Narayanan, P., Okazaki, A., Mackin, C., Fasoli, A., Rasch, M. J., Friz, A. M., Luquin, J., Yasuda, T., et al. (2025) · Nature Communications · doi:10.1038/s41467-025-63794-4 · Cited by 8
“As the amorphous phase within programmed PCM devices relaxes, device-conductances decrease logarithmically over time 38 .”
Self-citationZhou, Y., Hu, X., Wang, L., & Duan, S. (2021) · Science China Information Sciences · doi:10.1007/s11432-020-3204-y · Cited by 12
“Some researchers analyzed the impact of activation function, the number of hidden layers and filters on conductance drift [16].”
BackgroundPalhares, J. H. Q., Garg, N., Beilliard, Y., Anghel, L., Alibart, F., Drouin, D., & Galy, P. (2024) · Journal of Low Power Electronics and Applications · doi:10.3390/jlpea14040050 · Cited by 8
“…hardware. the other hand, software-based methods for drift correction, commonly used in SNNs and artificial neural networks (ANNs), apply global gain factors to adjust for drift using average drift coefficients, but they typically require periodic recalibration or supervised retraining [6,7].”
Frank, M. M., Li, N., Rasch, M. J., Jain, S., Chen, C.-T., Muralidhar, R., Han, J., Narayanan, V., Philip, T. M., Brew, K. W., et al. (2023) · IEEE International Reliability Physics Symposium proceedings · doi:10.1109/irps48203.2023.10117874 · Cited by 9
“Research efforts have therefore been focused on device improvements for drift reduction [27], [28], simultaneously benefiting multi-level storage applications, as well as on circuit and algorithmic approaches to minimize the inference accuracy impact of unavoidable drift [29]-[31].”
BackgroundSelf-citationEnabling High-Performance DNN Inference Accelerators Using Non-Volatile Analog Memory (Invited)
Chen, A., Ambrogio, S., Narayanan, P., Tsai, H.-Y. S., Mackin, C., Spoon, K., Friz, A. M., Fasoli, A., & Burr, G. W. (2020) · IEEE Electron Devices Technology & Manufacturing Conference (EDTM) · doi:10.1109/edtm47692.2020.9117896 · Cited by 7
“2d-f [16].”
BackgroundInfluentialSelf-citationNguyen, T.-H., Imran, M., Choi, J., & Yang, J.-S. (2024) · IEEE transactions on computers · doi:10.1109/tc.2024.3404096 · Cited by 6
Reminding forgetful organic neuromorphic device networks
Felder, D., Muche, K., Linkhorst, J., & Wessling, M. (2022) · Neuromorph. Comput. Eng. · doi:10.1088/2634-4386/ac9c8a · Cited by 6
“Device reminders In contrast to, for example, PCM devices [23], the conductance drift of organic devices is a complex function of the device’s state and, therefore, more difficult to compensate.”
BackgroundAnalog-memory-based 14nm Hardware Accelerator for Dense Deep Neural Networks including Transformers
Okazaki, A., Narayanan, P., Ambrogio, S., Hosokawa, K., Tsai, H.-Y. S., Nomura, A., Yasuda, T., Mackin, C., Friz, A. M., Ishii, M., et al. (2022) · IEEE International Symposium on Circuits and Systems proceedings · doi:10.1109/iscas48785.2022.9937292 · Cited by 6
“A drift compensation technique [2] subtracts off the average drift behavior.”
MethodSelf-citationNeuromorphic Computing with Phase Change, Device Reliability, and Variability Challenges
Mackin, C., Narayanan, P., Ambrogio, S., Tsai, H.-Y. S., Spoon, K., Fasoli, A., Chen, A., Friz, A. M., Shelby, R. M., & Burr, G. W. (2020) · IEEE International Reliability Physics Symposium proceedings · doi:10.1109/irps45951.2020.9128315 · Cited by 5
“The efficacy of slope correction is also evaluated in more detail for the LSTM network and CNN shown in Figure 3b and Figure 3c, respectively [27], [34].”
BackgroundMethodInfluentialSelf-citationDifficulties and approaches in enabling learning-in-memory using crossbar arrays of memristors
Wang, W. J., Li, Y., & Wang, M. (2024) · Neuromorphic Computing and Engineering · doi:10.1088/2634-4386/ad6732 · Cited by 4
“Read noise and conductance drift in long term could also degrade the accuracy of MAC calculation [35, 36].”
High-density analog image storage in an analog-valued non-volatile memory array
Zheng, X., Zarcone, R., Levy, A., Khwa, W., Raina, P., Olshausen, B., & Wong, H. P. (2022) · Neuromorph. Comput. Eng. · doi:10.1088/2634-4386/aca92c · Cited by 5
Accelerating Deep Neural Networks with Analog Memory Devices
Ambrogio, S., Narayanan, P., Tsai, H.-Y. S., Mackin, C., Spoon, K., Chen, A., Fasoli, A., Friz, A. M., & Burr, G. W. (2020) · IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS) · doi:10.1109/aicas48895.2020.9073978 · Cited by 11
“Alternatively, activation function compensation techniques can also be adopted, providing further benefits [15].”
BackgroundSelf-citationHu, Q., Dong, B.-Y., Wang, L., Huang, E.-M., Tong, H., He, Y.-H., Xu, M., & Miao, X.-S. (2020) · Chinese Physics B · doi:10.1088/1674-1056/ab892a · Cited by 5
Technology-Aware Drift Resilience Analysis of RRAM Crossbar Array Configurations
Reiser, D., Reichenbach, M., Rizzi, T., Baroni, A., Fritscher, M., Wenger, C., Zambelli, C., & Bertozzi, D. (2023) · IEEE Interregional NEWCAS Conference (NEWCAS) · doi:10.1109/newcas57931.2023.10198076 · Cited by 6
Chen, C.-T., Xie, C.-C., Chen, H., Xu, S., Li, X., Sui, Z., & Song, Z. (2023) · IEEE Transactions on Electron Devices · doi:10.1109/ted.2022.3232080 · Cited by 4
“…overcome the von Neumann bottleneck, spontaneous structural relaxation of PCMs gives rise to the drift [7] and the 1/f noise behavior, resulting in conductivity overlap, which is shown to be detrimental to multilevel storage reliability and maintaining the accuracy of the neural network [8], [9].”
BackgroundPark, S., Koo, M., & Kim, S. (2025) · Journal of Physics D: Applied Physics · doi:10.1088/1361-6463/ae23dd · Cited by 2
“To mitigate these effects, various approaches such as program-and-verify schemes, adaptive pulse modulation, and feedback-controlled write strategies have been proposed to enhance write accuracy and minimize resistance drift over repeated operations [73].”
Fu, Z., Zuo, Y., Ma, Y.-Z., & Huang, J. (2025) · International Symposium on Low Power Electronics and Design · doi:10.1109/islped65674.2025.11261801 · Cited by 2
“Device engineering [36] and circuit-device co-design [37] can further alleviate effects, which is out of the scope of this work.”
Rapid yet accurate Tile-circuit and device modeling for Analog In-Memory ComputingPreprint
Luquin, J., Mackin, C., Ambrogio, S., Chen, A., Baldi, F., Miralles, G., Rasch, M., Büchel, J., Lalwani, M., Ponghiran, W., et al. (2025) · arXiv.org · doi:10.48550/arxiv.2506.00004 · Cited by 2
“Many types of PCM noise 14–16 , such as programming noise, read noise, device-to-device variability, and drift, and their effects on DNN accuracy have been modeled using DNN frameworks 8,10,17,18 .”
Self-citationUltra-Long Disturb-Free Read Operation With Low Resistance Drift in Phase Change Memory
Wang, R.-Q., Zheng, J., Wang, R.-B., Xie, C.-C., Xie, L., Li, X., Song, Z.-T., & Zhou, X.-L. (2025) · IEEE Transactions on Electron Devices · doi:10.1109/ted.2025.3555276 · Cited by 2
“The reliability of memory array with regard to resistance drift and programming endurance is a crucial factor for the precision of compute-in-memory [12], [13].”
Haidar, A., Ntinas, V. G., & Tetzlaff, R. (2025) · IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS) · doi:10.1109/aicas64808.2025.11173140 · Cited by 1
“However, GDC is less effective in handling localized effects and requires periodic re-calibration [15]–[17].”
Phase Change Memory-based Hardware Accelerators for Deep Neural Networks (invited)
Burr, G. W., Narayanan, P., Ambrogio, S., Okazaki, A., Tsai, H.-Y. S., Hosokawa, K., Mackin, C., Nomura, A., Yasuda, T., Demarest, J. J., et al. (2023) · IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) · doi:10.23919/vlsitechnologyandcir57934.2023.10185411 · Cited by 2
Self-citationKobayashi, M. (2022) · IEEE International Reliability Physics Symposium · doi:10.1109/irps48227.2022.9764534 · Cited by 2
Optimized Weight Programming for Analogue Memory-based Deep Neural Networks
Mackin, C., Rasch, M., Chen, A., Timcheck, J., Bruce, R., Narayanan, P., Ambrogio, S., Gallo, M. L., Rajaleksh, N., Fasoli, A., et al. (2021) · doi:10.21203/rs.3.rs-1028668/v1 · Cited by 2
“As mentioned earlier, this can be mitigated using a drift compensation technique 28 , where activations are amplified to their original levels using a digital scale factor α , which may or may not be uniform along the column-wise dimension of the crossbar array.”
MethodSelf-citationRyu, D., Kim, T., Jang, T., Yu, J.-S., Lee, J.-H., & Park, B.-G. (2020) · IEEE Access · doi:10.1109/access.2020.3041734 · Cited by 2
Mordido, G., Henwood, S., Chandar, S., & Leduc-Primeau, F. (2022) · arXiv.org · doi:10.48550/arxiv.2211.11561 · Cited by 1
“However, as pointed out previously, GT,ij is not achievable in practice since conductance errors δij are originated from programming and read noise [48] as well as conductance drift over time [1].”
HERCULES: Hardware-Efficient, Robust, Continual Learning Neural Architecture Search
Gambella, M., Pittorino, F., & Roveri, M. (2026) · arXiv.org · doi:10.48550/arxiv.2605.04103 · Cited by 1
“Mitigations span hardware-level material engineering [94], circuit-level schemes [95], and algorithmic noise-aware training [96], [97].”
Genetic Algorithm-Based Training Method for Memristor Neural Networks
Zhang, W., Zhang, Q., & Wu, H. (2024) · International Journal of Computer Applications · doi:10.5120/ijca2024924139 · Cited by 1
“However, non-idealities like conductance drift, read disturbances, wire parasitics, and device degradation pose challenges, causing inaccuracies and malfunctions [6, 1, 8].”
Phase-Change Memory Based Passive Timing Circuits for DRAM Refresh Management
Fan, A., Lu, Y.-M., Sun, G.-Y., Li, B., Yan, B.-N., & Yang, Y.-C. (2026) · International Symposium on Circuits and Systems · doi:10.1109/iscas66217.2026.11562264
“Theamorphous phase of PCM materials gradually transforms into a more stable glassy state due to spontaneous structural relaxation [30].”
Haidar, A., Abdelsamad, A., Yang, H.-L., Ntinas, V., & Tetzlaff, R. (2025) · International Congress of Mathematicans · doi:10.1109/icm66518.2025.11322501
“Existing techniques to manage PCM drift include hardware-aware (HWA) training and inference methods, which explicitly account for drift and variability during neural network training, and Global Drift Compensation (GDC) [6], a hardware-level solution for global recalibration [7], [8].”
M, D. A., S, Y., B, T., Vellingiri, K., Mahalingam, S., & Karuppuswamy, R. (2025) · 2025 International Conference on Intelligent Innovations in Engineering and Technology (ICIIET) · doi:10.1109/iciiet65921.2025.11377990
“Therefore, it is essential to analyze how such errors affect DNN accuracy [5].”
Farias, M., Martins, W. S., & Kung, H. T. (2026) · IEEE International Symposium on Circuits and Systems proceedings · doi:10.1109/iscas66217.2026.11562844
“…by nonidealities—such as sneak paths [5]–[8], process-voltage-temperature variations [9], [10], stuck-at faults [11]–[14], conductance drift [15], [16], and parasitic resistance (PR) [17]–[19]—which degrade inference accuracy and restrict computational parallelism in large-scale workloads [20],…”
Henwood, S., Mordido, G., Savaria, Y., Chandar, S., & Leduc-Primeau, F. (2024) · Asilomar Conference on Signals, Systems and Computers · doi:10.1109/ieeeconf60004.2024.10943038
“The conductance value that will be seen by the computations will differ from the desired value as a result of programming and read noise [7] as well as conductance drift over time [11].”
Dependability of Future Edge-AI Processors: Pandora’s Box
Gomony, M. D., Gebregiorgis, A., Fieback, M., Geilen, M. C. W., Stuijk, S., Richter-Brockmann, J., Bishnoi, R., Argo, S., Arche-Andradas, L., Güneysu, T. E., et al. (2023) · IEEE European Test Symposium (ETS) · doi:10.1109/ets56758.2023.10174180
Chang, C.-C., Li, S.-T., Pan, T., Tsai, C.-M., Wang, I.-T., Chang, T.-S., & Hou, T. (2021) · doi:10.21203/rs.3.rs-709318/v1
Accelerating Deep Neural Networks with Analog Memory Devices
Spoon, K., Ambrogio, S., Narayanan, P., Tsai, H.-Y. S., Mackin, C., Chen, A., Fasoli, A., Friz, A. M., & Burr, G. W. (2020) · IEEE International Memory Workshop (IMW) · doi:10.1109/imw48823.2020.9108149 · Cited by 10
“[9].”
BackgroundMethodInfluentialSelf-citation
Metadata
- Authors
- Ambrogio, S., Gallot, M., Spoon, K., Tsai, H., Mackin, C., Wesson, M., Kariyappa, S., Narayanan, P., Liu, C.-C., Kumar, A., Chen, A., & Burr, G. W.
- Affiliations
- IBM Research - Almaden (US)
- Venue
- 2019 IEEE International Electron Devices Meeting (IEDM)
- Publisher
- IEEE
- Published
- 2019-12
- Pages
- 6.1.1-6.1.4
- ISSN
- 0163-1918 (ISSN-L)
- OpenAlex
- W3005874416
- Cited by
- 76
- References
- 0
- Citations by year
- 2026: 3 · 2025: 11 · 2024: 9 · 2023: 10 · 2022: 16 · 2021: 13 · 2020: 14
- FWCI
- 17.11
- Type
- conference paper
- Language
- en
- Open access
- closed
- Locations
- Technical digest - International Electron Devices Meeting/Technical digest (publishedVersion)
- Topics
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Advanced Memory and Neural Computing
- Physical Sciences › Materials Science › Materials Chemistry › Phase-change materials and chalcogenides
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Ferroelectric and Negative Capacitance Devices
- Keywords
- phase-change memory, conductance drift, neural network hardware, neural network inference, cycle-to-cycle variation, slope correction, device-to-device variation, random telegraph noise, 1/f noise, hardware accelerators
About these checks
Registry, retraction, Cites and statistics results are computed, not judged, with one exception: a printed reference that no index lists is read once by a model before it counts as a citation error. Claims are extracted by a model and kept only when their quote appears verbatim in the text; each cited source is then checked, with a model’s help, for whether it says what the claim relies on. Those verdicts can be wrong — read the claim’s quote and the cited source before relying on one.
Statistics and arithmetic are recomputed, not judged.
Confidence bands are shown only for fields calibrated on our annotated test set. None is calibrated yet, so no band is shown.
What counts as a claim ›How we measure confidence ›How we check this ›
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