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Spike-timing-dependent learning in memristive nanodevices
Abstract
The neuromorphic paradigm is attractive for nanoscale computation because of its massive parallelism, potential scalability, and inherent defect-, fault-, and failure-tolerance. We show how to implement timing-based learning laws, such as spike-timing-dependent plasticity (STDP), in simple, memristive nanodevices, such as those constructed from certain metal oxides. Such nano-scale ldquosynapsesrdquo can be combined with CMOS ldquoneuronsrdquo to create neuromorphic hardware several orders of magnitude denser than is possible in conventional CMOS. The key ideas are: (1) to factor out two synaptic state variables to pre- and post-synaptic neurons; and (2) to separate computational communication from learning by time-division multiplexing of pulse-width-modulated signals through synapses. This approach offers the advantages of: better control over power dissipation; fewer constraints on the design of memristive materials used for nanoscale synapses; learning dynamics can be dynamically turned on or off (e.g. by attentional priming mechanisms communicated extra-synaptically); greater control over the precise form and timing of the STDP equations; the ability to implement a variety of other learning laws besides STDP; better circuit diversity since the approach allows different learning laws to be implemented in different areas of a single chip using the same memristive material for all synapses.
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“They can also be used to implement digital logic [9], synapses in neural applications [10,11], and hybrid circuits [6,12].”
From Sub-nanosecond switching of a tantalum oxide memristor (2011) · cites this paper as [10]
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Items 201–300 of 340
Bottleneck of using single memristor as a synapse and its solutionPreprint
Merrikh-Bayat, F., Shouraki, S. B., & Afrakoti, I. E. P. (2010) · arXiv (Cornell University) · doi:10.48550/arxiv.1008.3450 · Cited by 11
“weights in biological systems. Figure 1 shows a typical but not necessarily efficient neuromorphic system which is constructed based on these nanoscale passive elements and used in some recent studies [7]. In this figure, memristive devices are fabricated between two perpendicular wires in every crosspoints of the crossb…”
BackgroundSpike timing dependent plasticity with memristive synapse in neuromorphic systems
Chan, W., & Lohn, J. D. (2012) · International Joint Conference on Neural Networks (IJCNN) · doi:10.1109/ijcnn.2012.6252822 · Cited by 9
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Dias, C., Ventura, J. O., & Aguiar, P. (2017) · Studies in computational intelligence · doi:10.1007/978-3-319-51724-7_13 · Cited by 9
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“Recently, a nanoscale device known as the “memristor” has been shown to be suitable as a synapse in neuromorphic systems [4, 5].”
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Georgiou, P. S. (2013) · doi:10.25560/17981 · Cited by 9
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“Furthermore, the modulation process is flexible by choosing proper pulse amplitude (Kuzum et al., 2011), width (Snider, 2008), and frequency (He et al., 2014) of the pulse train.”
BackgroundSemi-Trained Memristive Crossbar Computing Engine with In Situ Learning Accelerator
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BackgroundDevice-aware Circuit Design for Robust Memristive Neuromorphic Systems with STDP-based Learning
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“Similarly, in Reference [48] a time division multiplexing of pulses was proposed.”
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“First implementation was proposed by Snider [36] with time multiplexing approach (Fig.”
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“Therefore, a time-division multiplexing (TDM) approach could be used to design the shape of the spike to emulate the STDP behavior [8].”
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Qiu, L., Chen, W., Wang, F.-J., & Lin, J. (2019) · Chaos, Solitons & Fractals · doi:10.1016/j.chaos.2019.05.040 · Cited by 6
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“3(c), the shape of the spike was designed with a time-division multiplexing (TDM) method [19].”
MethodLi, Z., Zheng, Q., Yan, B., Huang, R., Li, B., & Chen, Y. (2022) · ACM/IEEE Design Automation Conference (DAC) · doi:10.1145/3489517.3530591 · Cited by 6
“Implementing synapses with ReRAM devices has been widely investigated, whereas most works focus on realizing either spike-timing-dependency-plasticity (STDP) or supervised learning rules with ReRAM devices [7, 9, 16, 17].”
Novel High Current‐Carrying Quasi‐1D Material: Nb2PdS6
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“Implementations of typical synapses functions, such as spike-timing-dependent plasticity (STDP) [11, 12] and short-and long-term potentiation (LTP) [8, 13, 14], have been re-ported using different devices.”
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Serrano‐Gotarredona, T., Masquelier, T., & Linares-Barranco, B. (2019) · Springer eBooks · doi:10.1007/978-3-319-76375-0_15 · Cited by 6
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MethodSelf-citationTowards Playlist Generation Algorithms Using RNNs Trained on Within-Track Transitions
Choi, K., Fazekas, G., & Sandler, M. B. (2016) · Queen Mary Research Online (Queen Mary University of London) · doi:10.1145/1235
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“Synapse plays the key role in learning, thinking, and memorizing for a human being, and there are approximately 1014 synapses in a human’s brain [2].”
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Memristive device based learning for navigation in robots
Sarim, M., Kumar, M., Jha, R., & Minai, A. A. (2017) · Bioinspiration & Biomimetics · doi:10.1088/1748-3190/aa7eab · Cited by 4
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MethodParallel memristors: Improving variation tolerance in memristive digital circuits
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BackgroundHigh density crossbar structure for memory application
Kim, S. (2011) · Deep Blue (University of Michigan) · Cited by 2
Efficient and Low Overhead Memristive Activation Circuit for Deep Learning Neural Networks
Bala, A., Yang, X., Adeyemo, A., & Jabir, A. M. (2019) · Journal of Low Power Electronics · doi:10.1166/jolpe.2019.1600 · Cited by 1
“MAX Vx Vy = ⎧⎨ ⎩ Vx Vx ≥ Vy Vy otherwise (6)”
Karimi, G., & Rastegar, S. (2022) · Journal of Theoretical Biology · doi:10.1016/j.jtbi.2022.111119 · Cited by 1
Cheng, Q., Chen, T., Tang, X., Duan, S., & Wang, L. (2026) · Cognitive Neurodynamics · doi:10.1007/s11571-025-10393-0 · Cited by 1
“Memristors are capable of emulating key biological synaptic mechanisms–including long-term potentiation (LTP), long-term depression (LTD), short-term potentiation (STP), and spike-timing-dependent plasticity (STDP) (Snider 2008 ; Thomas 2013).”
Low Power Computing Paradigms Based on Emerging Non-Volatile Nanodevices
Wang, Kang, K., Cheng, C., Klein, Zhang, & Zhao (2014) · Acta Scientiarum Naturalium Universitatis Sunyatseni · Cited by 1
Embedded tutorial - Can silicon machines match the efficiency of the human brain?
Rajendran, B. (2013) · International Conference on VLSI Design · doi:10.1109/vlsid.2013.151 · Cited by 1
“Bipin Rajendran, Department of Electrical Engineering, IIT Bombay”
BackgroundA Macromodel of Memristor Using Symbolically Defined Devices
Deng, J. H., Wang, L., & Liu, Q. H. (2012) · Applied Mechanics and Materials · doi:10.4028/www.scientific.net/amm.195-196.245 · Cited by 1
Associate learning law in a memristive neural network
Liu, Y., Huang, H., & Huang, T. (2013) · International Conference on Advanced Computational Intelligence (ICACI) · doi:10.1109/icaci.2013.6748503 · Cited by 1
“Two popular algorithms named back-propagation (BP) algorithm and spike-timing-dependent-plasticity (S TDP) algorithm are proposed to solve different problems [11] [12] [13] [14].”
MethodEvolving Unipolar Memristor Spiking Neural Networks
Howard, D., Bull, L., & Costello, B. D. L. (2015) · Lecture notes in computer science · doi:10.1007/978-3-319-14803-8_20 · Cited by 1
Radio Frequency Chaotic Circuit Design
VOLOS, C. K., Kyprianidis, I. M., Stouboulos, I. N., & Pham, V. (2015) · Advances in computer and electrical engineering book series · doi:10.4018/978-1-4666-6627-6.ch015 · Cited by 1
Modeling of Memristive Devices for Neuromorphic Application
Zayer, F., Dghais, W., & Belagcem, H. (2017) · Lecture notes in networks and systems · doi:10.1007/978-3-319-72215-3_8 · Cited by 1
A Novel Scan-In Scheme for CMOS/ReRAM Programmable Logic Circuits
Adnan, M. M., Amer, S., & Rose, G. S. (2018) · IEEE International Symposium on Circuits and Systems proceedings · doi:10.1109/iscas.2018.8351185 · Cited by 1
“MrDANNA system implements a Spiking Neural Network (SNN) featuring evolutionary optimization algorithm for offline learning [9] and Spike Timing Dependent Plasticity for on-line learning [10].”
MethodSnider, G. S. (2012) · Springer eBooks · doi:10.1007/978-94-007-4491-2_1 · Cited by 1
Self-citationMultilevel Resistance Programming in Conductive Bridge Resistive Memory
Mahalanabis, D. (2015) · Cited by 1
Evolving spiking networks with variable memristors
Howard, G., Gale, E., Bull, L., Costello, B. D. L., & Adamatzky, A. (2011) · ACM SIGEVOlution · doi:10.1145/2020616.2020618 · Cited by 1
A Nonlinear Approach to Generate Creative Data Using Physarum polycephalum-based Memristors
Venkatesh, S., Braund, E., & Miranda, E. R. (2022) · River Publishers eBooks · doi:10.1201/9781003339540-4 · Cited by 1
Synaptic realizations based on memristive devices
Milo, V., Dalgaty, T., Ielmini, D., & Vianello, E. (2020) · Elsevier eBooks · doi:10.1016/b978-0-08-102782-0.00017-4 · Cited by 1
Abbood, A. D., Hasan, A. A., & Attea, B. A. (2021) · Iraqi Journal of Science · doi:10.24996/ijs.2021.62.10.31 · Cited by 1
“In the same year, HP combined the memristive with CMOS neurons to produce neuromorphic circuits [9-10].”
BackgroundEvolving Memristive Neural Networks
Howard, G. D., Bull, L., Costello, B. D. L., Gale, E., & Adamatzky, A. (2019) · Springer eBooks · doi:10.1007/978-3-319-76375-0_24 · Cited by 1
Neocortical frame-free vision sensing and processing through scalable Spiking ConvNet hardware
Camuñas-Mesa, L. A., Pérez‐Carrasco, J. A., Zamarreño-Ramos, C., Serrano‐Gotarredona, T., & Linares-Barranco, B. (2010) · International Joint Conference on Neural Networks (IJCNN) · doi:10.1109/ijcnn.2010.5596366 · Cited by 1
Memristive fuzzy edge detectorPreprint
Merrikh-Bayat, F., & Shouraki, S. B. (2011) · arXiv (Cornell University) · doi:10.48550/arxiv.1109.4609 · Cited by 1
“ture to store the 2-dimensional analog weight matrix of a neural network [16, 17].”
Background
Metadata
- Authors
- Snider, G. S.
- Affiliations
- Hewlett-Packard (United States) (US)
- Corresponding author
- Snider, Greg S.
- Venue
- 2008 IEEE International Symposium on Nanoscale Architectures
- Publisher
- IEEE
- Published
- 2008-06
- Pages
- 85-92
- OpenAlex
- W2101834447
- Cited by
- 341
- References
- 22
- Citations by year
- 2026: 4 · 2025: 3 · 2024: 8 · 2023: 9 · 2022: 12 · 2021: 11 · 2020: 12 · 2019: 19 · 2018: 14 · 2017: 24 · 2016: 17 · 2015: 30 · 2014: 24 · 2013: 46 · 2012: 43
- FWCI
- 30.31
- Type
- conference paper
- Language
- en
- Open access
- closed
- Locations
- IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH) (publishedVersion)
- Topics
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Advanced Memory and Neural Computing
- Physical Sciences › Engineering › Electrical and Electronic Engineering › Ferroelectric and Negative Capacitance Devices
- Physical Sciences › Mathematics › Theoretical Computer Science › DNA and Biological Computing
- Keywords
- spike-timing-dependent plasticity, neuromorphic hardware, time-division multiplexing, pulse width modulation, power dissipation, learning law, attentional priming, fault-tolerant computing
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